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Topic: Random Access Memory

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Microprocessors in CRT terminals

1974 / IEEE
By: Whiting, J. W.; Cropper, L. C.;

A simplified microcomputer architecture

1974 / IEEE
By: Weisbecker, Joe;

Microprocessors present and future

1974 / IEEE
By: Laliotis, Theodore A.;

Microprocessors: Design and applications in digital instrumentation and control

1976 / IEEE
By: Majithia, J.C.; Banks, W.;

Analysis of an ultrasonic spatial locating system

1976 / IEEE
By: Mace, L.E.; Shreve, P.L.; Moritz, W.E.;

Structure specification with a procedural hardware description language

1981 / IEEE
By: Swanson, R.E.; Hill, F.J.; Navabi, Z.; Masud, M.;

Solid state looks to VLSI: Meanwhile, uncommitted logic arrays enjoy a revival and new bubble memories are introduced

1980 / IEEE
By: Bernhard, Robert;

Solid state: Four targets of VLSI: Medical electronics, telecommunications, terminals, and scientific computers are candidates for its early application

1980 / IEEE
By: Mokhoff, Nicolas;

Random testing of integrated circuits

1981 / IEEE
By: Thevenod-Fosse, P.; David, R.;

CMOS dynamic-RAMs approach static RAM speeds

1985 / IEEE
By: Eaton, S.S.; Brady, J.; Allan, J.D.;

Fundamental limitations on DRAM storage capacitors

1985 / IEEE
By: Noble, W.P.; Walker, W.W.;

A programmable function generator for dynamic analysis testing

1987 / IEEE
By: Vanherck, P.; van der Auweraer, H.; Snoeys, R.;

A microcomputer-controlled multichannel programmable pattern generator

1987 / IEEE
By: Libsch, F.R.; Roy, A.; White, M.H.;

Design of multiple input/output modal analysis instrumentation

1987 / IEEE
By: Van der Auweraer, H.D.; Snoeys, R.; Vanherck, P.;

NON-VON's performance on certain database benchmarks

1986 / IEEE
By: Hillyer, B.K.; Nigam, A.; Shaw, D.E.;

Instrumentation for high-speed image connectivity

1987 / IEEE
By: Frendo, M.; Kitai, R.; Capson, D.W.;

Parallel computation of electromagnetic fields on transputers

1989 / IEEE
By: Hafner, C.;

Comparative Analysis of SEU in FinFET SRAM Cells for Superthreshold and Subthreshold Supply Voltage Operation

2011 / IEEE
By: Rathod, S.S.; Dasgupta, S.; Saxena, A.K.;

Highly Manufacturable Device Isolation Technology Using Laser-Induced Epitaxial Growth for Monolithic Stack Devices

2011 / IEEE
By: Seung Jae Baik; Yong-Hoon Son; Euijoon Yoon; Yoo Gyun Shin; Gihyun Hwang; Jong-Wook Lee; Sanghun Jeon;

Monolithic 3-D Integration of SRAM and Image Sensor Using Two Layers of Single-Grain Silicon

2011 / IEEE
By: Beenakker, C.I.M.; Morrison, T.; Robertson, M.; Tajari Mofrad, M.R.; Ishihara, R.; Golshani, N.; Derakhshandeh, J.;

Tri-Mode Independent-Gate FinFETs for Dynamic Voltage/Frequency Scalable 6T SRAMs

2011 / IEEE
By: Gupta, S.K.; Roy, K.; Park, S.P.;

Error Detection and Correction in Microprocessor Core and Memory Due to Fast Dynamic Voltage Droops

2011 / IEEE
By: Raychowdhury, A.; De, V.; Karnik, T.; Wilkerson, C.; Tokunaga, C.; Bowman, K.; Geuskens, B.; Khellah, M.; Aseron, P.; Shih-Lien Lu; Tschanz, J.;

Intertrack Interference Cancellation for Shingled Magnetic Recording

2011 / IEEE
By: Ming Jin; Jongseung Park; Mathew, G.; Haratsch, E.F.; Yuan Xing Lee; Worrell, K.J.;

Three-dimensional image processing VLSI system with network-on-chip system and reconfigurable memory architecture

2011 / IEEE
By: Yun Yang;

Architecture exploration of flash memory storage controller through a cycle accurate profiling

2011 / IEEE
By: Sanghyuk Jung; Hoeseung Jung; Yong Ho Song;

Power efficient motion estimation algorithm and architecture based on pixel truncation

2011 / IEEE
By: Chakrabarti, I.; Chatterjee, S.K.;

Prefetch-Aware Memory Controllers

2011 / IEEE
By: Mutlu, O.; Chang Joo Lee; Patt, Y.N.; Narasiman, V.;

Asymmetrically Doped FinFETs for Low-Power Robust SRAMs

2011 / IEEE
By: Moradi, F.; Roy, K.; Mahmoodi, H.; Wisland, D.T.; Panagopoulos, G.; Gupta, S.K.;

A 28 nm Dual-Port SRAM Macro With Screening Circuitry Against Write-Read Disturb Failure Issues

2011 / IEEE
By: Tanaka, S.; Fujiwara, H.; Ishii, Y.; Yanagisawa, K.; Kihara, Y.; Nii, K.; Tsukamoto, Y.;

Performance Implications of Nonuniform Device Topologies in Scalable Heterogeneous Architectures

2011 / IEEE
By: Roth, P.C.; Meredith, J.S.; Vetter, J.S.; Spafford, K.L.;

Simultaneous Reverse Body and Negative Word-Line Biasing Control Scheme for Leakage Reduction of DRAM

2011 / IEEE
By: Bai-Sun Kong; Young-Hyun Jun; Dong-Su Lee;

A Digitized Replica Bitline Delay Technique for Random-Variation-Tolerant Timing Generation of SRAM Sense Amplifiers

2011 / IEEE
By: Niki, Y.; Yabe, T.; Fujimura, Y.; Tachibana, F.; Kushida, K.; Hirabayashi, O.; Takeyama, Y.; Suzuki, A.; Kawasumi, A.;

Characterization of Dynamic SRAM Stability in 45 nm CMOS

2011 / IEEE
By: Seng Oon Toh; Nikolic, B.; Liu, T.-J.K.; Zheng Guo;

An Early Warning System Based on Reputation for Energy Control Systems

2011 / IEEE
By: Lopez, J.; Fernandez-Gago, C.; Alcaraz, C.;

A Lightweight Message Authentication Scheme for Smart Grid Communications

2011 / IEEE
By: Kato, N.; Fadlullah, Z.M.; Fouda, M.M.; Xuemin Shen; Rongxing Lu;

A 250 mV 8 kb 40 nm Ultra-Low Power 9T Supply Feedback SRAM (SF-SRAM)

2011 / IEEE
By: Teman, A.; Fish, A.; Cohen, O.; Pergament, L.;

Memristor Logic Operation Gate With Share Contact RRAM Cell

2011 / IEEE
By: Wen Chao Shen; Chrong Jung Lin; Chih, Y.-D.; Yuan Heng Tseng;

Keeneland: Bringing Heterogeneous GPU Computing to the Computational Science Community

2011 / IEEE
By: Roth, P.; Rogers, J.; Meredith, J.; McNally, S.; Loftis, B.; Spafford, K.; Schwan, K.; Dongarra, J.; Glassbrook, R.; Vetter, J.S.; Yalamanchili, S.;

Memory Built-in Self-Repair Planning Framework for RAMs in SoCs

2011 / IEEE
By: Chih-Sheng Hou; Tsu-Wei Tseng; Jin-Fu Li;

Memory Reliability Model for Accumulated and Clustered Soft Errors

2011 / IEEE
By: Soonyoung Lee; Reviriego, P.; Sanghyeon Baeg;

Product Futures

2011 / IEEE
By: Kahng, Andrew B.;

Analysis of Ultra-Thin-Body SOI Subthreshold SRAM Considering Line-Edge Roughness, Work Function Variation, and Temperature Sensitivity

2011 / IEEE
By: Ming-Long Fan; Hu, V.P.-H.; Ching-Te Chuang; Pin Su;

Layout-Aware Multi-Cell Upsets Effects Analysis on TMR Circuits Implemented on SRAM-Based FPGAs

2011 / IEEE
By: Bocquillon, A.; Panariti, A.; Violante, M.; Sterpone, L.; Miller, F.; Gerardin, S.; Paccagnella, A.; Manuzzato, A.; Buard, N.;

Data Management and Layout for Shingled Magnetic Recording

2011 / IEEE
By: Schwarz, T.; Paris, J.; Miller, E.L.; Long, D.D.E.; Holliday, J.; Amer, A.;

Reset Statistics of NiO-Based Resistive Switching Memories

2011 / IEEE
By: Ming Liu; Ielmini, D.; Cagli, C.; Shibing Long; Sune, J.;

An Evaluation of Asynchronous Stacks

2011 / IEEE
By: Finchelstein, D.; Ebergen, J.; Hopkins, D.; Lexau, J.; Kao, R.;

Roadmapping Power

2011 / IEEE
By: Kahng, Andrew B.;

FPGA-Based Particle Recognition in the HADES Experiment

2011 / IEEE
By: Kuhn, W.; Ming Liu; Jantsch, A.; Zhonghai Lu;

A Custom FPGA Processor for Physical Model Ordinary Differential Equation Solving

2011 / IEEE
By: Vahid, F.; Chen Huang; Givargis, T.;

Fast Switching in Magnetic Tunnel Junctions With Two Pinned Layers: Micromagnetic Modeling

2012 / IEEE
By: Selberherr, S.; Osintsev, D.; Sverdlov, V.; Makarov, A.;

A Novel 1T-1D DRAM Cell for Embedded Application

2012 / IEEE
By: Cheng-Wei Cao; Zhang, D.W.; Peng-Fei Wang; Xing, C.; Qing-Qing Sun; Xi Lin; Song-Gan Zang;

Investigation of the Statistical Variability of Static Noise Margins of SRAM Cells Using the Statistical Impedance Field Method

2012 / IEEE
By: Wettstein, A.; El Sayed, K.; Polsky, B.; Lyumkis, E.; Simeonov, S.D.;

Enabling Efficient and Scalable Hybrid Memories Using Fine-Granularity DRAM Cache Management

2012 / IEEE
By: Mutlu, O.; HanBin Yoon; Jichuan Chang; Meza, J.; Ranganathan, P.;

Method for Measuring Mixed Field Radiation Levels Relevant for SEEs at the LHC

2012 / IEEE
By: Thornton, A.; Spiezia, G.; Pignard, C.; Peronnard, P.; Kramer, D.; Brugger, M.; Roeed, K.;

Denser and More Stable SRAM Using FinFETs With Multiple Fin Heights

2012 / IEEE
By: Chenming Hu; Sachid, A.B.;

Theory and Experiments of the Impact of Work-Function Variability on Threshold Voltage Variability in MOS Devices

2012 / IEEE
By: Grubbs, M.E.; Deal, M.; Hoffmann, T.; Ragnarsson, L.; Mitard, J.; Jing Li; Nishi, Y.; Xiao Zhang; Clemens, B.M.; Magyari-Kope, B.;

A key management framework for AMI networks in smart grid

2012 / IEEE
By: Famolari, D.; Kanda, M.; Ohba, Y.; Das, S.; Das, S.K.;

Management of resource constrained devices in the internet of things

2012 / IEEE
By: Kuryla, S.; Perelman, V.; Sehgal, A.; Schonwalder, J.;

Numerical Simulations of Automatic Change of Threshold Voltage Shift in SRAM With Double-Floating-Gate Structures

2012 / IEEE
By: Kinoshita, A.; Sakuma, K.; Tatsumura, K.; Tanamoto, T.; Muraoka, K.; Fujita, S.;

Neutron-Induced Charge Collection Simulation of Bulk FinFET SRAMs Compared With Conventional Planar SRAMs

2011 / IEEE
By: Yi-Pin Fang; Oates, A.S.;

Progress and Prospects of Spin Transfer Torque Random Access Memory

2012 / IEEE
By: Chen, E.; Lukaszew, R.A.; Driskill-Smith, A.; Khvalkovskiy, A.; Lottis, D.; Moon, K.; Nikitin, V.; Ong, A.; Tang, X.; Watts, S.; Kawakami, R.; Krounbi, M.; Wolf, S.A.; Poon, S.J.; Lu, J.W.; Ghosh, A.W.; Stan, M.; Butler, W.; Mewes, T.; Gupta, S.; Mewes, C.K.A.; Visscher, P.B.; Apalkov, D.;

Soft-Error Rate Induced by Thermal and Low Energy Neutrons in 40 nm SRAMs

2012 / IEEE
By: Gasiot, G.; Munteanu, D.; Semikh, S.; Serre, S.; Autran, J.L.; Roche, P.;

Influence of User-Controlled Parameters in Alpha Particle-Induced Single-Event Error Rates in Commercial SRAM Cells

2012 / IEEE
By: Bhuva, B. L.; Chatterjee, I.; Wong, R.; Wen, S.-J.;

Underground Experiment and Modeling of Alpha Emitters Induced Soft-Error Rate in CMOS 65 nm SRAM

2012 / IEEE
By: Martinie, S.; Gasiot, G.; Roche, P.; Uznanski, S.; Munteanu, D.; Sauze, S.; Autran, J. L.;

Soft Error Susceptibilities of 22 nm Tri-Gate Devices

2012 / IEEE
By: Seifert, N.; Gill, B.; Jahinuzzaman, S.; Basile, J.; Ambrose, V.; Quan Shi; Allmon, R.; Bramnik, A.;

Self-Controlled Writing and Erasing in a Memristor Crossbar Memory

2011 / IEEE
By: Mazumder, P.; Ebong, I.E.;

Efficient logging of metadata using NVRAM for NAND flash based file system

2012 / IEEE
By: Chul Lee; Seung-Ho Lim;

Universal view synthesis unit for glassless 3DTV

2012 / IEEE
By: In Ryu; Ji-Youn Choi; Jungsik Park; Jong-Il Park;

Compressed memory swap for QoS of virtualized embedded systems

2012 / IEEE
By: Jeonghwan Choi; Hwanju Kim; Jinkyu Jeong; Jeaho Hwang; Joonwon Lee;

Low-Power Spectral-Line Clock Recovery Algorithm for SDR Applications

2011 / IEEE
By: Kiasaleh, K.; Webb, A.; Montazeri, A.;

The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM

2011 / IEEE
By: Nowka, K.; Nassif, S.; Saroop, S.; Frohnel, T.; Kuang, J.B.; Gebara, F.H.; Schaub, J.D.; Wendel, D.;

Technology Variability From a Design Perspective

2011 / IEEE
By: Liang-Teck Pang; Zheng Guo; Giraud, B.; Jaehwa Kwak; Ji-Hoon Park; Seng Oon Toh; Nikolic, B.; Spanos, C.; Kun Qian; Jevtic, R.;

A Pseudorandom Number Generator Based on Time-Variant Recursion of Accumulators

2011 / IEEE
By: Gonzalez-Diaz, V.R.; Maloberti, F.; Setti, G.; Pareschi, F.;

Cost-Performance Optimization of SSL-Based Secure Distributed Infrastructures

2011 / IEEE
By: Bregni, S.; Poli, A.; Giacomazzi, P.;

Robust Pipelined Memory System with Worst Case Performance Guarantee for Network Processing

2012 / IEEE
By: Haiquan Zhao; Hao Wang; Jun Xu; Lin, B.;

Active Low-Power Modes for Main Memory with MemScale

2012 / IEEE
By: Wenisch, T.; Meisner, D.; Bianchini, R.; Ramos, L.; Qingyuan Deng;

A 2T1C Embedded DRAM Macro With No Boosted Supplies Featuring a 7T SRAM Based Repair and a Cell Storage Monitor

2012 / IEEE
By: Jain, P.; Wei Zhang; Ki Chul Chun; Kim, C.H.;

Supporting Very Large DRAM Caches with Compound-Access Scheduling and MissMap

2012 / IEEE
By: Loh, G.; Hill, M.D.;

Memory Speed Analysis of Optical RAM and Optical Flip-Flop Circuits Based on Coupled SOA-MZI Gates

2012 / IEEE
By: Pleros, N.; Miliou, A.; Vyrsokinos, K.; Fitsios, D.;

Cost Effective Protection Techniques for TCAM Memory Arrays

2012 / IEEE
By: Pekmestzi, K.; Sideris, I.;

Optical RAM and Flip-Flops Using Bit-Input Wavelength Diversity and SOA-XGM Switches

2012 / IEEE
By: Vagionas, C.; Miliou, A.; Pleros, N.; Kanellos, G.T.; Fitsios, D.;

ANLS: Adaptive Non-Linear Sampling Method for Accurate Flow Size Measurement

2012 / IEEE
By: Yan Chen; Yu Cheng; Jia Tian; Sheng Wang; Bin Liu; Chengchen Hu;

A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric 2T Gain Cell for High Speed On-Die Caches

2012 / IEEE
By: Jain, P.; Ki Chul Chun; Kim, C.H.; Tae-Ho Kim;

Characterizing the Capacitive Crosstalk in SRAM Cells Using Negative Bit-Line Voltage Stress

2012 / IEEE
By: Sungju Park; Sanghyeon Baeg; Jongsun Bae;

Large-Scale Multiple Cell Upsets in 90 nm Commercial SRAMs During Neutron Irradiation

2012 / IEEE
By: Hands, A.; Dyer, C.; Ryden, K.; Morris, P.;

(Re)Designing Data-Centric Data Centers

2012 / IEEE
By: Jichuan Chang; Ranganathan, P.;

Neutron-Induced Multiple Bit Upsets on Two Commercial SRAMs Under Dynamic-Stress

2012 / IEEE
By: Girard, P.; Dilillo, L.; Galliere, J.-M.; Rech, P.; Griffoni, A.; Saigne, F.; Wrobel, F.; Boch, J.;

Ultra Low-Energy SRAM Design for Smart Ubiquitous Sensors

2012 / IEEE
By: Dehaene, W.; Catthoor, F.; Huisken, J.; Ashouie, M.; Cosemans, S.; Sharma, V.;

Information Security: New Threats or Familiar Problems?

2012 / IEEE
By: Kessler, G.C.;

A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface

2012 / IEEE
By: Amirkhany, A.; Xingchao Yuan; Mishra, N.K.; Jie Shen; Beyene, W.T.; Chen, C.; Chin, T.J.; Dressier, D.; Huang, C.; Gadde, V.P.; Hekmat, M.; Kaviani, K.; Hai Lan; Phuong Le; Mahabaleshwara; Madden, C.; Mukherjee, S.; Raghavan, L.; Saito, K.; Secker, D.; Sendhil, A.; Schmitt, R.; Fazeel, S.; Srinivas, G.S.; Ting Wu; Chanh Tran; Vaidyanath, A.; Vyas, K.; Ling Yang; Jain, M.; Chang, K.-Y.K.; Wei, J.;

Compact Measurement Schemes for Bit-Line Swing, Sense Amplifier Offset Voltage, and Word-Line Pulse Width to Characterize Sensing Tolerance Margin in a 40 nm Fully Functional Embedded SRAM

2012 / IEEE
By: Ping Wang; Hung-Jen Liao; Wei-Min Chan; Sun, D.; Meng-Fan Chang; Li, Q.; Shao-Yu Chou; Yen-Huei Chen; Yamauchi, H.;

A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface

2012 / IEEE
By: Kaviani, K.; Xingchao Yuan; Wei, J.; Amirkhany, A.; Jie Shen; Chin, T.J.; Thakkar, C.; Beyene, W.T.; Chan, N.; Chen, C.; Bing Ren Chuang; Dressler, D.; Gadde, V.P.; Hekmat, M.; Ho, E.; Huang, C.; Phuong Le; Mahabaleshwara; Madden, C.; Mishra, N.K.; Raghavan, L.; Saito, K.; Schmitt, R.; Secker, D.; Xudong Shi; Fazeel, S.; Srinivas, G.S.; Zhang, S.; Tran, C.; Vaidyanath, A.; Vyas, K.; Jain, M.; Kun-Yung Ken Chang; Ting Wu;

Free-p: A Practical End-to-End Nonvolatile Memory Protection Mechanism

2012 / IEEE
By: Jouppi, N.P.; Ranganathan, P.; Jichuan Chang; Muralimanohar, N.; Doe Hyun Yoon; Erez, M.;

Effect of Carrier Transport in Oxides Surrounding Active Devices on SEU in 45 nm SOI SRAM

2012 / IEEE
By: Turowski, M.; Schrimpf, R. D.; Reed, R. A.; King, M. P.; Ball, D.; Alles, M. L.; Raman, A.;

SEU Recovery Mechanism for SRAM-Based FPGAs

2012 / IEEE
By: Legat, U.; Novak, F.; Biasizzo, A.;

Impact of Strained-Si PMOS Transistors on SRAM Soft Error Rates

2012 / IEEE
By: Bhuva, B. L.; Mahatme, N. N.; Oates, A. S.; Fang, Y.-P.;

Process Variability Effect on Soft Error Rate by Characterization of Large Number of Samples

2012 / IEEE
By: Roche, P.; Clerc, S.; Abouzeid, F.; Glorieux, M.; Castelnovo, A.; Gasiot, G.;

Analysis and design of coding and interleaving in a MIMO-OFDM communication system

2012 / IEEE
By: Iqbal, Z.; Heung-No Lee; Nooshabadi, S.;

A 1.0-ns/1.0-V Delay-Locked Loop With Racing Mode and Countered CAS Latency Controller for DRAM Interfaces

2012 / IEEE
By: Hyun-Woo Lee; Byong-Tae Chung; Beom-Ju Shin; Kyung-Hoon Kim; Kyung-Whan Kim; Jaeil Kim; Kwang-Hyun Kim; Jong-Ho Jung; Jae-Hwan Kim; Eun-Young Park; Jong-Sam Kim; Jong-Hwan Kim; Jin-Hee Cho; Namgyu Rye; Jun-Hyun Chun; Yunsaing Kim; Chulwoo Kim; Young-Jung Choi; Hoon Choi;

Geant4 Analysis of n-Si Nuclear Reactions From Different Sources of Neutrons and Its Implication on Soft-Error Rate

2012 / IEEE
By: Semikh, S.; Serre, S.; Roche, P.; Gasiot, G.; Munteanu, D.; Autran, J. L.; Uznanski, S.;

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