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Topic: Integrated Circuit Design

Results

Tri-Mode Independent-Gate FinFETs for Dynamic Voltage/Frequency Scalable 6T SRAMs

2011 / IEEE
By: Gupta, S.K.; Roy, K.; Park, S.P.;

A Hermetic Wireless Subretinal Neurostimulator for Vision Prostheses

2011 / IEEE
By: Rizzo, I.J.F.; Wyatt, J.L.; Theogarajan, L.; Behan, S.; Drohan, W.A.; Kelly, S.K.; Cogan, S.F.; Gingerich, M.D.; Doyle, P.; Jinghua Chen; Shire, D.B.;

Analysis and Design of Crosstalk Noise Reduction for Coupled Striplines Inserted Guard Trace With an Open-Stub on Time-Domain in High-Speed Digital Circuits

2011 / IEEE
By: Jia-Hung Shiu; Guang-Hwa Shiue; Po-Wei Chiu;

Implementation and evaluation of a high-performance MIMO detector for wireless LAN systems

2011 / IEEE
By: Sandell, M.; Milford, D.; Soler-Garrido, J.; Vetter, H.;

Silicon VLSI catches the millimeter wave

2011 / IEEE
By: Spirito, M.; Yi Zhao; Wei Liat Chan; Long, J.R.;

Design Space Exploration of Typical STT MTJ Stacks in Memory Arrays in the Presence of Variability and Disturbances

2011 / IEEE
By: Roy, K.; De, V.; Tschanz, J.; Somasekhar, D.; Raychowdhury, A.; Augustine, C.;

Evaluation of Thin Film Noise Suppressor Applied to Noise Emulator Chip Implemented in 65 nm CMOS Technology

2011 / IEEE
By: Nagata, M.; Sasaki, Y.; Yoshikawa, K.; Sasaki, Y.; Yamaguchi, M.; Endo, Y.; Kodate, W.; Muroga, S.;

High-Throughput, Low-Power Software-Defined Radio Using Reconfigurable Processors

2011 / IEEE
By: Unekawa, Y.; Perre, L.; Fujisawa, T.; Vander Aa, T.; Suzuki, T.; Takeda, D.; Yamagishi, T.; Yamada, H.; Horisaki, K.;

Post-Placement Power Optimization With Multi-Bit Flip-Flops

2011 / IEEE
By: Yao-Tsung Chang; Chih-Cheng Hsu; Lin, M.P.-H.;

Resilient Architectures via Collaborative Design: Maximizing Commodity Processor Performance in the Presence of Variations

2011 / IEEE
By: Reddi, V.J.; Brooks, D.;

An Algorithmic Study of Exact Route Matching for Integrated Circuits

2011 / IEEE
By: Hentschke, R.F.; Ozdal, M.M.;

Reliable State Retention-Based Embedded Processors Through Monitoring and Recovery

2011 / IEEE
By: Sheng Yang; Khursheed, S.; Al-Hashimi, B.M.; Flynn, D.; Idgunji, S.;

Asynchronous Bypass Channels for Multi-Synchronous NoCs: A Router Microarchitecture, Topology, and Routing Algorithm

2011 / IEEE
By: Jain, T.N.K.; Gwan Choi; Sprintson, A.; Gratz, P.V.; Ramakrishna, M.;

TALk: A Temperature-Aware Leakage Minimization Technique for Real-Time Systems

2011 / IEEE
By: Leventhal, S.R.; Lin Yuan; Gang Qu; Junjun Gu;

Dynamic Programming Networks for Large-Scale 3D Chip Integration

2011 / IEEE
By: Chi-Sang Poon; Yakovlev, A.; Yicong Meng; Kai-Pui Lam; Kuan Zhou; Al-Dujaily, R.; Mak, T.;

STT-RAM Cell Optimization Considering MTJ and CMOS Variations

2011 / IEEE
By: Yaojun Zhang; Yiran Chen; Hai Li; Xiaobin Wang;

A Low-Power 32-Channel Digitally Programmable Neural Recording Integrated Circuit

2011 / IEEE
By: Wattanapanitch, W.; Sarpeshkar, R.;

A 122 GHz Sub-Harmonic Mixer With a Modified APDP Topology for IC Integration

2011 / IEEE
By: Scheytt, C.J.; Yaoming Sun;

Adaptive Testing: Dealing with Process Variability

2011 / IEEE
By: Maxwell, P.;

Single-Event Tolerant Flip-Flop Design in 40-nm Bulk CMOS Technology

2011 / IEEE
By: Loveless, T.D.; Jagannathan, S.; Massengill, L.W.; Rennie, D.; Sachdev, M.; Wong, R.; Wen, S.; Bhuva, B.L.;

Proteus: An ASIC Flow for GHz Asynchronous Designs

2011 / IEEE
By: Lines, A.M.; Dimou, G.D.; Beerel, P.A.;

Audio Telecom ADC Featuring Click-Free Gain Control Technique, Dithering Insertion, and Idle Tone Shifting

2012 / IEEE
By: Rizzo, F.; Becker, R.; Saletti, R.; Zito, D.; Somayajula, S.S.;

A Beam Phase and Energy Measurement Instrument Based on Direct RF Signal IQ Undersampling Technique

2012 / IEEE
By: Lei Zhao; Shaochun Tang; Qi An; Weihao Wu; Xinjun Hao; Shubin Liu;

A High-Level Power Model for MPSoC on FPGA

2012 / IEEE
By: Piscitelli, R.; Pimentel, A.;

Scalability and Design-Space Analysis of a 1T-1MTJ Memory Cell for STT-RAMs

2012 / IEEE
By: Toriyama, Y.; Fengbo Ren; Dorrance, R.; Markovic, D.; Yang, C.-K.K.; Hafez, A.A.;

A Two-Dimensional Analysis Method on STI-Aware Layout-Dependent Stress Effect

2012 / IEEE
By: Yan Wang; Yaohua Tan; Zuochang Ye; Xiaojian Li;

Distributed Modeling of Six-Port Transformer for Millimeter-Wave SiGe BiCMOS Circuits Design

2012 / IEEE
By: Madihian, M.; Wang Ling Goh; Wei Hong; Debin Hou; Yong Zhong Xiong; Jixin Chen; Jin He; Arasu, M.A.;

Interpolation-Based Parameterized Model Order Reduction of Delayed Systems

2012 / IEEE
By: Antonini, G.; Nakhla, M.; Ferranti, F.; Ruehli, A.E.; Knockaert, L.; Dhaene, T.;

Exploiting the Body of MOS Devices for High Performance Analog Design

2011 / IEEE
By: Monsurro, P.; Trifiletti, A.; Scotti, G.; Pennisi, S.;

Progress and Prospects of Spin Transfer Torque Random Access Memory

2012 / IEEE
By: Chen, E.; Lukaszew, R.A.; Driskill-Smith, A.; Khvalkovskiy, A.; Lottis, D.; Moon, K.; Nikitin, V.; Ong, A.; Tang, X.; Watts, S.; Kawakami, R.; Krounbi, M.; Wolf, S.A.; Poon, S.J.; Lu, J.W.; Ghosh, A.W.; Stan, M.; Butler, W.; Mewes, T.; Gupta, S.; Mewes, C.K.A.; Visscher, P.B.; Apalkov, D.;

Optimum Reliability Sizing for Complementary Metal Oxide Semiconductor Gates

2012 / IEEE
By: Ibrahim, W.; Beg, A.; Beiu, V.;

Pulse-Biased Low-Power Low-Phase-Noise UHF LC-QVCO for 866 MHz RFID Front-End

2012 / IEEE
By: Hasan, S.M.R.; Jie Li;

Spin-Torque Driven Switching Probability Density Function Asymmetry

2012 / IEEE
By: Wang, K.L.; Yisong Zhang; Hui Zhao; Jian-Ping Wang; Amiri, P.K.; Krivorotov, I.N.; Hongwen Jiang; Langer, J.; Katine, J.A.;

CALORIC: A Readout Chip for High Granularity Calorimeter

2012 / IEEE
By: Royer, L.; Soumpholphakdy, X.; Gay, P.; Manen, S.; Bonnard, J.;

Design of Ultrafast Encryption and Decryption Circuits for Secured Optical Networks

2012 / IEEE
By: Lovkesh; Singh, S.; Kaler, R.S.; Xiaohua Ye;

Sign-Extension Avoidance and Word-Length Optimization by Positive-Offset Representation for FIR Filter Design

2011 / IEEE
By: Manoli, Y.; Lotze, N.; Faust, M.; Chip-Hong Chang; Ruimin Huang;

A MM-Wave Configurable VCO Using MCPW-Based Tunable Inductor in 65-nm CMOS

2011 / IEEE
By: Berenguer, R.; Gui Liu; Yang Xu;

Analog Filter Design Using Ring Oscillator Integrators

2012 / IEEE
By: Talegaonkar, M.; Drost, B.; Hanumolu, P.K.;

Logic Synthesis for Switching Lattices

2012 / IEEE
By: Altun, M.; Riedel, M.D.;

A Low-Power Wideband Transmitter Front-End Chip for 80 GHz FMCW Radar Systems With Integrated 23 GHz Downconverter VCO

2012 / IEEE
By: Klein, T.; Pohl, N.; Rein, H.-M.; Aufinger, K.;

Access Time Analysis for IEEE P1687

2012 / IEEE
By: Larsson, E.; Carlsson, G.; Ingelsson, U.; Zadegan, F.G.;

Correlation of Dynamic Parameter Modification and ASET Sensitivity in a Shunt Voltage Reference

2012 / IEEE
By: Buchner, S.P.; Roche, N.J.-H.; Azais, B.; Auriel, G.; McMorrow, D.; Saigne, F.; Warner, J.H.; Boch, J.; Kruckmeyer, K.; Dusseau, L.;

A Translinear, Log-Domain FPAA on Standard CMOS Technology

2012 / IEEE
By: Martinez-Alvarado, L.; Fernandez, D.; Madrenas, J.;

Generalized Design of High Performance Shunt Active Power Filter With Output LCL Filter

2012 / IEEE
By: Feng Gao; Fook Hoong Choo; Peng Wang; Poh Chiang Loh; Yi Tang; Blaabjerg, F.;

0.16-0.25 pJ/bit, 8 Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking

2012 / IEEE
By: Kangmin Hu; Chiang, P.Y.; Palermo, S.; Ragab, A.; Chao Ma; Tao Jiang; Rui Bai;

A Dual-Channel 23-Gbps CMOS Transmitter/Receiver Chipset for 40-Gbps RZ-DQPSK and CS-RZ-DQPSK Optical Transmission

2012 / IEEE
By: Momtaz, A.; Jun Cao; Huang, N.; Ali, T.; Wei Zhang; Maarefi, H.; Nazemi, A.; Khanpour, M.; Pi, D.; Zhi Huang; Vasani, A.; Singh, U.; Raghavan, B.; Delong Cui; Bo Zhang;

A DC/DC Boosting Technique and Power Management for Ultralow-Voltage Energy Harvesting Applications

2012 / IEEE
By: Comensoli, S.; Richelli, A.; Kovacs-Vajna, Z.M.;

CMOS software-defined radio transceivers: Analog design in digital technology

2012 / IEEE
By: Craninckx, J.;

The Design of All-Digital Polar Transmitter Based on ADPLL and Phase Synchronized �� Modulator

2012 / IEEE
By: Liang Rong; Jian Chen; Li-Rong Zheng; Geng Yang; Jonsson, F.;

A 100 W 5.1-Channel Digital Class-D Audio Amplifier With Single-Chip Design

2012 / IEEE
By: Shih-Hsiung Chien; Jia-Ming Liu; Tai-Haur Kuo;

Differential Charge Cancellation (DCC) Layout as an RHBD Technique for Bulk CMOS Differential Circuit Design

2012 / IEEE
By: Hooten, N.C.; Armstrong, S.E.; Kauppila, J.S.; Atkinson, N.M.; Warner, J.H.; Blaine, R.W.; Massengill, L.W.; Holman, W.T.;

Design of a 4-W Envelope Tracking Power Amplifier With More Than One Octave Carrier Bandwidth

2012 / IEEE
By: Chin Hsia; Yan, J.J.; Asbeck, P.M.; Kimball, D.F.;

Associative Memory for Nearest-Hamming-Distance Search Based on Frequency Mapping

2012 / IEEE
By: Yasuda, M.; Ansari, T.; Kawabata, A.; Imafuku, W.; Mattausch, H.J.; Koide, T.;

An 8.0-Gb/s HyperTransport Transceiver for 32-nm SOI-CMOS Server Processors

2012 / IEEE
By: Loke, A.L.S.; Doyle, B.A.; Maheshwari, S.K.; Fang, E.S.; Wang, C.L.; Tin Tin Wee; Fischette, D.M.;

An Efficient Pre-Assignment Routing Algorithm for Flip-Chip Designs

2012 / IEEE
By: Yao-Wen Chang; Po-Wei Lee; Chung-Wei Lin; Wei-Chih Tseng; Chin-Fang Shen;

Design Requirements for Steeply Switching Logic Devices

2012 / IEEE
By: Hei Kam; Alon, E.; Tsu-Jae King Liu;

Quantum Efficiency Determination of a Novel CMOS Design for Fast Imaging Applications in the Extreme Ultraviolet

2012 / IEEE
By: Maryasov, A.P.; Banyay, M.; Herbert, S.; Juschkin, L.; Vogt, H.; Paschen, U.; Hochschulz, F.;

An Analog Integrated Circuit Beamformer for High-Frequency Medical Ultrasound Imaging

2012 / IEEE
By: Gurun, G.; Degertekin, F.L.; Hasler, P.E.; Karaman, M.; Sisman, A.; Zahorian, J.S.;

On Using On-Chip Clock Tuning Elements to Address Delay Degradation Due to Circuit Aging

2012 / IEEE
By: Nicolici, N.; Lak, Z.;

Analysis and Design of 60-GHz SPDT Switch in 130-nm CMOS

2012 / IEEE
By: Jin He; Yue Ping Zhang; Yong-Zhong Xiong;

Can GPGPU Programming Be Liberated from the Data-Parallel Bottleneck?

2012 / IEEE
By: Gaster, B.R.; Howes, L.;

An Open-Loop Half-Quadrature Hybrid for Multiphase Signals Generation

2012 / IEEE
By: Huan-Sheng Chen; Liang-Hung Lu;

Subsampling Feedback Loop Applicable to Concurrent Dual-Band Linearization Architecture

2012 / IEEE
By: Kwan, A.; Bassam, S.A.; Ghannouchi, F.M.; Helaoui, M.; Wenhua Chen;

Subtractive Router for Tree-Driven-Grid Clocks

2012 / IEEE
By: Gunion, C.L.; Kozhaya, J.N.; Restle, P.J.; Haifeng Qian;

Efficient Wakeup Scheduling Considering Both Resource Usage and Timing Budget for Power Gating Designs

2012 / IEEE
By: Ming-Chao Lee; Shih-Chieh Chang; Yiyu Shi;

Fast Timing-Model Independent Buffered Clock-Tree Synthesis

2012 / IEEE
By: Yao-Wen Chang; Xin-Wei Shih;

OSCAR: An Optimization Methodology Exploiting Spatial Correlation in Multicore Design Spaces

2012 / IEEE
By: Mariani, G.; Silvano, C.; Zaccaria, V.; Palermo, G.;

Algorithms for Gate Sizing and Device Parameter Selection for High-Performance Designs

2012 / IEEE
By: Burns, S.; Ozdal, M.M.; Jiang Hu;

A Practical Regularization Technique for Modified Nodal Analysis in Large-Scale Time-Domain Circuit Simulation

2012 / IEEE
By: Chung-Kuan Cheng; Shih-Hung Weng; Quan Chen;

Obstacle-Avoiding Rectilinear Steiner Tree Construction: A Steiner-Point-Based Algorithm

2012 / IEEE
By: Sy-Yen Kuo; Chih-Hung Liu; Shih-Yi Yuan; Jung-Hung Weng; Chun-Syun Lin; Lee, D.T.;

On Signal Selection for Visibility Enhancement in Trace-Based Post-Silicon Validation

2012 / IEEE
By: Xiao Liu; Qiang Xu;

Pad Assignment for Die-Stacking System-in-Package Design

2012 / IEEE
By: Wai-Kei Mak; Ting-Chi Wang; Chu, C.; Yu-Chen Lin;

Silicon Photonic Switches Hybrid-Integrated With CMOS Drivers

2012 / IEEE
By: Yang, M.; Doany, F.E.; Jahnes, C.V.; Kash, J.A.; Vlasov, Y.A.; Van Campenhout, J.; Assefa, S.; Green, W.M.J.; Lee, B.G.; Schow, C.L.; Rylyakov, A.V.;

INTEGRA: Fast Multibit Flip-Flop Clustering for Clock Power Saving

2012 / IEEE
By: Jiang, I.H.; Yu-Ming Yang; Chih-Long Chang;

Recovery-Driven Design: Exploiting Error Resilience in Design of Energy-Efficient Processors

2012 / IEEE
By: Kahng, A.B.; Sartori, J.; Kumar, R.; Seokhyeong Kang;

An Analytical Placer for VLSI Standard Cell Placement

2012 / IEEE
By: Wenxing Zhu; Jianli Chen;

Phase-Noise Analysis and Simulation of LC Oscillator-Based Injection-Locked Frequency Dividers

2012 / IEEE
By: Maffezzoni, P.; Levantino, S.;

Obstacle-Aware Clock-Tree Shaping During Placement

2012 / IEEE
By: Markov, I.L.; Dong-Jin Lee;

Efficient Identification of Unstable Loops in Large Linear Analog Integrated Circuits

2012 / IEEE
By: Mukherjee, P.; Peng Li; Burt, R.; Fang, G.P.;

TRECO: Dynamic Technology Remapping for Timing Engineering Change Orders

2012 / IEEE
By: Kuan-Hsien Ho; Yao-Wen Chang; Jiang, J.R.;

A Fast and Near-Optimal Clustering Algorithm for Low-Power Clock Tree Synthesis

2012 / IEEE
By: Shelar, R.S.;

NLDMOS ESD Scaling Under Human Metal Model for 40-V Mixed-Signal Applications

2012 / IEEE
By: Salcedo, J.A.; Malobabic, S.; Liou, J.J.; Hajjar, J.-J.;

Design of Adaptive Highly Efficient GaN Power Amplifier for Octave-Bandwidth Application and Dynamic Load Modulation

2012 / IEEE
By: Kenle Chen; Peroulis, D.;

Maximum Circuit Activity Estimation Using Pseudo-Boolean Satisfiability

2012 / IEEE
By: Najm, F.N.; Veneris, A.; Mangassarian, H.;

Design and Implementation of Block-Based Partitioning for Parallel Flip-Chip Power-Grid Analysis

2012 / IEEE
By: Chun-Jen Wei; Sao-Jie Chen; Chen, H.;

Neural Network-Based Thermal Simulation of Integrated Circuits on GPUs

2012 / IEEE
By: Ruggiero, M.; Vincenzi, A.; Sridhar, A.; Atienza, D.;

Postgrid Clock Routing for High Performance Microprocessor Designs

2012 / IEEE
By: Young, E.F.Y.; Wai-Chung Tang; Haitong Tian; Sze, C.N.;

A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor

2012 / IEEE
By: Kurts, T.; Mehalel, M.; Shor, J.; Knoll, E.; Altshuler, E.; Yuffe, M.; Zelikson, M.; Luria, K.; Fayneh, E.;

Circuit and Physical Design Implementation of the Microprocessor Chip for the zEnterprise System

2012 / IEEE
By: Warnock, J.; Huott, W.; Carey, S.; Huajun Wen; Meaney, P.; Gerwig, G.; Smith, H.H.; Yuen Chan; Davis, J.; Bunce, P.; Pelella, A.; Rodko, D.; Patel, P.; Strach, T.; Malone, D.; Malgioglio, F.; Neves, J.; Rude, D.L.; Yiu-Hing Chan;

An Investigation of Linearity Performance and Intermodulation Distortion of GME CGT MOSFET for RFIC Design

2012 / IEEE
By: Gupta, R.S.; Haldar, S.; Ghosh, P.; Gupta, M.;

On-Chip Noise Sensor for Integrated Circuit Susceptibility Investigations

2012 / IEEE
By: Vrignon, B.; Boyer, A.; Dhia, S.; Dinh, T.V.; Deobarro, M.;

Chip-Level Design Constraints to Comply With Conducted Electromagnetic Emission Specifications

2012 / IEEE
By: Musolino, F.; Fiori, F.; Villavicencio, Y.;

Electrothermal Modeling and Design Strategies for Multibit Phase-Change Memory

2012 / IEEE
By: Jaeho Lee; Jeyasingh, R.G.D.; Zijian Li; Goodson, K.E.; Wong, H.-S.P.; Asheghi, M.;

Passive Subharmonic Generation Using Memoryless Nonlinear Circuits

2012 / IEEE
By: Safarian, Z.; Hashemi, H.;

Static and Dynamic Modeling of Single-Electron Memory for Circuit Simulation

2012 / IEEE
By: Bounouar, M.; Guilmain, M.; Beaumont, A.; Wei Xuan; Baboux, N.; Calmon, F.; Drouin, D.; Etzkorn, J.;

Power-Efficient High-Speed and High-Resolution Capacitive-Sensor Interface for Subnanometer Displacement Measurements

2012 / IEEE
By: Sha Xia; Nihtianov, S.;

BeamCal Instrumentation IC: Design, Implementation, and Test Results

2012 / IEEE
By: Wooley, B.A.; Haller, G.; Dragone, A.; Abusleme, A.;

Low-Power Die-Level Process Variation and Temperature Monitors for Yield Analysis and Optimization in Deep-Submicron CMOS

2012 / IEEE
By: de Gyvez, J.P.; Barragan, M.J.; Zjajo, A.;

Variation Study and Implications for BJT-Based Thin-Body Capacitorless DRAM

2012 / IEEE
By: Min Hee Cho; Tsu-Jae King Liu;

Design and Validation of Arbiter-Based PUFs for Sub-45-nm Low-Power Security Applications

2012 / IEEE
By: Lang Lin; Burleson, W.; Shabadi, P.; Krishnappa, D.K.; Srivathsa, S.;

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