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Topic: Field Programmable Gate Arrays

Results

FPGA-Based Adaptive Speckle Suppression Filter for Underwater Imaging Sonar
2011 / IEEE
By: Karabchevsky, S.; Guterman, H.; Ben-Harush, O.; Kahana, D.;
Real-Time FPGA-Based Multichannel Spike Sorting Using Hebbian Eigenfilters
2011 / IEEE
By: Yakovlev, A.; Xia, F.; Li, X.; Mak, T.; Yu, B.; Poon, C.-S.; Sun, Y.;
Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation
2011 / IEEE
By: Millan, A.; Bellido, M.J.; Juan, J.; Viejo, J.; Ruiz-de-Clavijo, P.;
Improving performance and lifetime of solid-state drives using hardware-accelerated compression
2011 / IEEE
By: Sungjin Lee; Jihong Kim; Arvind; Fleming, K.; Jihoon Park;
A low energy adaptive hardware for H.264 multiple reference frame motion estimation
2011 / IEEE
By: Aysu, A.; Hamzaoglu, I.; Sayilar, G.;
Parallel pipelined array architectures for real-time histogram computation in consumer devices
2011 / IEEE
By: Wen-Chung Kao; Huerta, P.; Sherratt, R.S.; Cadenas, J.O.;
3D crosstalk compensation to enhance 3D image quality of plasma display panel
2011 / IEEE
By: Seong Hak Moon; Jun Hak Lee; Joong Min Ra; Taeho Kim; Kwang-Yeol Choi;
A cable modem receiver supporting four upstream channels
2011 / IEEE
By: Dong-Joon Choi; Jae-Ho Lee; Whan-Woo Kim; Soo-In Lee;
Design of multimedia stream channel arbiter in home network gateway
2011 / IEEE
By: Soon-Ju Kang; Joo-Yong Oh; Myung-Jin Lee;
Implementation and evaluation of a high-performance MIMO detector for wireless LAN systems
2011 / IEEE
By: Sandell, M.; Milford, D.; Soler-Garrido, J.; Vetter, H.;
A Novel Soft Error Detection and Correction Circuit for Embedded Reconfigurable Systems
2011 / IEEE
By: Iida, M.; Amagasaki, M.; Ichinomiya, Y.; Qian Zhao; Sueyoshi, T.;
Recent Developments in High Performance Computing for Remote Sensing: A Review
2011 / IEEE
By: Bormin Huang; Chein-I Chang; Plaza, A.; Gasster, S.D.; Lee, C.A.;
Product spotlights
2011 / IEEE
Are Field-Programmable Gate Arrays Ready for the Mainstream?
2011 / IEEE
By: Stitt, G.;
A 65 nm Gate-Level Pipelined Self-Synchronous FPGA for High Performance and Variation Robust Operation
2011 / IEEE
By: Devlin, B.; Asada, K.; Ikeda, M.;
Field Programmable Stateful Logic Array
2011 / IEEE
By: Kyosun Kim; Sung-Mo Kang; Sangho Shin;
It's an FPGA!
2011 / IEEE
By: Carter, B.; Bolsens, I.; Alfke, P.; Trimberger, S.; Santarini, M.;
High Throughput Data Mapping for Coarse-Grained Reconfigurable Architectures
2011 / IEEE
By: Doosan Cho; Yoon, J.W.; Shrivastava, A.; Jongeun Lee; Yongjoo Kim; Yunheung Paek;
Reliable State Retention-Based Embedded Processors Through Monitoring and Recovery
2011 / IEEE
By: Sheng Yang; Khursheed, S.; Al-Hashimi, B.M.; Flynn, D.; Idgunji, S.;
An Analytical Model of the Propagation Induced Pulse Broadening (PIPB) Effects on Single Event Transient in Flash-Based FPGAs
2011 / IEEE
By: Sterpone, L.; Chipana, R.; Kastensmidt, F.L.; Battezzati, N.;
Layout-Aware Multi-Cell Upsets Effects Analysis on TMR Circuits Implemented on SRAM-Based FPGAs
2011 / IEEE
By: Bocquillon, A.; Panariti, A.; Violante, M.; Sterpone, L.; Miller, F.; Gerardin, S.; Paccagnella, A.; Manuzzato, A.; Buard, N.;
Analyzing the Effects of TID in an Embedded System Running in a Flash-Based FPGA
2011 / IEEE
By: Fonseca, E.C.P.; Kastensmidt, F.L.; Azambuja, J.R.; Tarrillo, J.; Goncalez, O.; Galhardo, R.;
FPGAs, Programming Models, and Kit Cars
2011 / IEEE
By: Betz, Vaughn;
Energy-Efficient FastICA Implementation for Biomedical Signal Separation
2011 / IEEE
By: Chien-Shiun Chen; Di-You Wu; Lan-Da Van;
Intermediate Fabrics: Virtual Architectures for Near-Instant FPGA Compilation
2011 / IEEE
By: Coole, J.; Stitt, G.;
High-Level Languages and Floating-Point Arithmetic for FPGA-Based CFD Simulations
2011 / IEEE
By: Aracil, J.; Gomez-Arribas, F.J.; Gonzalez, I.; Lopez-Buedo, S.; Sutter, G.; Sanchez-Roman, D.; Palacios, F.;
FPGA-Based Particle Recognition in the HADES Experiment
2011 / IEEE
By: Kuhn, W.; Ming Liu; Jantsch, A.; Zhonghai Lu;
Data Archival to SD Card Via Hardware Description Language
2011 / IEEE
By: Todakar, V.S.; Elkeelany, O.;
A Custom FPGA Processor for Physical Model Ordinary Differential Equation Solving
2011 / IEEE
By: Vahid, F.; Chen Huang; Givargis, T.;
Demonstration of Failure Reconfiguration via Cross-Layer Enabled Optical Switching Fabrics
2011 / IEEE
By: Lai, C.P.; Bergman, K.; Bathula, B.G.; Ware, C.; Brunina, D.;
Trends in Design and Implementation of Signal Processing Systems [In the Spotlight]
2011 / IEEE
By: Liang-Gee Chen; Mansour, M.M.; Wonyong Sung;
Measurement and Evaluation of Power Analysis Attacks on Asynchronous S-Box
2012 / IEEE
By: Jun Wu; Minsu Choi; Yiyu Shi;
An FPGA-Based Embedded Robust Speech Recognition System Designed by Combining Empirical Mode Decomposition and a Genetic Algorithm
2012 / IEEE
By: Shing-Tai Pan; Xu-Yu Li;
Evaluation of Time Gateways for Synchronization of Substation Automation Systems
2012 / IEEE
By: Flammini, A.; Rinaldi, S.; Prytz, G.; Ferrari, P.;
A Beam Phase and Energy Measurement Instrument Based on Direct RF Signal IQ Undersampling Technique
2012 / IEEE
By: Lei Zhao; Shaochun Tang; Qi An; Weihao Wu; Xinjun Hao; Shubin Liu;
Pipelined CPU Design With FPGA in Teaching Computer Architecture
2012 / IEEE
By: Seung Eun Lee; Jong Hyuk Lee; Taeweon Suh; Heon Chang Yu;
A Project-Based Learning Approach to Programmable Logic Design and Computer Architecture
2012 / IEEE
By: Kellett, C.M.;
FPGA Design and Performance Evaluation of a Pulse-Based Echo Canceller for DVB-T/H
2012 / IEEE
By: Dardari, D.; Zabini, F.; Mazzotti, M.; Chiurco, G.; Andrisano, O.;
A High-Level Power Model for MPSoC on FPGA
2012 / IEEE
By: Piscitelli, R.; Pimentel, A.;
Quality Enhancement for Scalable View Window in Touchable Display Systems
2011 / IEEE
By: Yeong-Kang Lai; Yu-Fan Lai;
An Implementation of SOPC-Based Neural Monitoring System
2012 / IEEE
By: Hao Wang; You Zhou; Xueying Mao; Junqi Peng; Sheng Chang; Qijun Huang;
High-Speed Quantum Key Distribution System for 1-Mbps Real-Time Key Generation
2012 / IEEE
By: Miki, S.; Tomita, A.; Nambu, Y.; Takahashi, S.; Yoshino, K.; Yamashita, T.; Tanaka, A.; Tajima, A.; Fujiwara, M.; Sasaki, M.; Wang, Z.;
FPGA-Controlled All-Solid-State Nanosecond Pulse Generator for Biological Applications
2012 / IEEE
By: Caixin Sun; Yan Mi; Shoulong Dong; Fei Guo; Ximing Zhang; Chenguo Yao;
Reconfigurable high-speed platform: shifting the paradigm in education, research and engineering
2012 / IEEE
By: Vanderhorn, N.; Jin-Wei Tioh; Somani, A.K.; Weber, R.J.; Mina, M.;
Analog Signal Processing for Pulse Compression Radar in 90-nm CMOS
2012 / IEEE
By: Buckwalter, J.F.; Matsuo, M.; Parlak, M.;
Trigger Performance Simulation of a High Speed ADC-Based TOF-PET Read-Out System
2012 / IEEE
By: Rohrich, D.; Brekke, N.; Gruner, R.; Ullaland, K.;
On Extra Combinational Delays in SRAM FPGAs Due to Transient Ionizing Radiations
2012 / IEEE
By: Batani, N.; Moupfouma, F.; Blaquiere, Y.; Gloutnay, E.; Pichette, S.; Rufenacht, H.; Savaria, Y.; Audet, Y.; Thibeault, C.;
Evaluating the Effects of Combined Total Ionizing Dose Radiation and Electromagnetic Interference
2012 / IEEE
By: Benfica, J.; Bolzani Poehls, L. M.; Vargas, F.; Lipovetzky, J.; Lutenberg, A.; Garcia, S. E.; Gatti, E.; Hernandez, F.;
FPGA-Based Pulse Pile-Up Correction With Energy and Timing Recovery
2012 / IEEE
By: Pasko, J.; Haselman, M.D.; Miyaoka, R.S.; Lewellen, T.K.; Hauck, S.;
Performance of Cooled PWO Scintillators With Signal-Sampling Readout
2012 / IEEE
By: Tambave, G.; Lemmens, P.J.J.; Kavatsyuk, M.; Guliyev, E.; Lohner, H.;
Digital System for Acquisition and Processing of Detected Images
2012 / IEEE
By: Geraci, A.; Fiorini, C.; Abba, A.;
Nonlinear Trellis Codes for Binary-Input Binary-Output Multiple-Access Channels with Single-User Decoding
2012 / IEEE
By: Wesel, R.D.; Jiadong Wang; Chan, H.; Wen-Yen Weng; Casado, A.I.V.; Griot, M.;
PING for Nuclear Measurements: First Results
2012 / IEEE
By: Pin, P.; Kondrasovs, V.; Normand, S.; Tondut, L.; Corre, G.; Woo, R.; Bourbotte, J.-M.; Blanc de Lanaute, N.; Boudergui, K.;
Investigation of Low Dose Rate and Bias Conditions on the Total Dose Tolerance of a CMOS Flash-Based FPGA
2012 / IEEE
By: LaBel, K.; Wilcox, E.P.; Carts, M.A.; Poongyeub Lee; Nguyen, V.; Rezgui, S.; McCollum, J.; Telecco, N.;
Texture-adaptive skin detection for TV and its real-time implementation on DSP and FPGA
2012 / IEEE
By: Zafarifar, B.; de With, P.H.N.; van den Kerkhof, T.;
Introducing Programmable Logic to Undergraduate Engineering Students in a Digital Electronics Course
2012 / IEEE
By: Vazquez, M.; Marone, J.A.; Todorovich, E.;
A Generalized Rotate-and-Fire Digital Spiking Neuron Model and Its On-FPGA Learning
2011 / IEEE
By: Hishiki, T.; Torikai, H.; Matsubara, T.;
Low-Power Spectral-Line Clock Recovery Algorithm for SDR Applications
2011 / IEEE
By: Kiasaleh, K.; Webb, A.; Montazeri, A.;
A Pseudorandom Number Generator Based on Time-Variant Recursion of Accumulators
2011 / IEEE
By: Gonzalez-Diaz, V.R.; Maloberti, F.; Setti, G.; Pareschi, F.;
Post-silicon Validation Procedure for a PWL ASIC Microprocessor Architecture
2011 / IEEE
By: Julian, P.; Rodriguez, J.A.; Lifschitz, O.; Agamennoni, O.;
A Biasing and Demodulation System for Kilopixel TES Bolometer Arrays
2012 / IEEE
By: Hyland, P.; Dobbs, M.; Bissonnette, E.; Aubin, F.; Smecher, G.; MacDermid, K.;
Development of an embedded module using FPGA technology and Fuzzy technique
2011 / IEEE
By: Cambraia Leite, L.; Batista, E.A.; Basmage Pinheiro Machado, L.; Palmiro, F.;
Design and Implementation of a Nonblocking 2-Dilated Flattened Butterfly Switching Network
2011 / IEEE
By: Chandy, J.A.; Thamarakuzhi, A.;
Leveraging Software-Defined Radio Techniques in Multichannel Digital Weather Radar Receiver Design
2012 / IEEE
By: Yeary, M.; Isom, B.M.; Kelley, R.; Meier, J.; Palmer, R.D.;
Efficient Implementation of RFID Mutual Authentication Protocol
2012 / IEEE
By: Yu-Jung Huang; Hung-Lin Li; Wei-Cheng Lin;
Codesign Tradeoffs for High-Performance, Low-Power Linear Algebra Architectures
2012 / IEEE
By: van de Geijn, R.A.; Pedram, A.; Gerstlauer, A.;
DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing
2012 / IEEE
By: Sankaralingam, K.; Satish, N.; Chhugani, J.; Nowatzki, T.; Chen-Han Ho; Govindaraju, V.; Changkyu Kim;
Efficient Mapping of Task Graphs onto Reconfigurable Hardware Using Architectural Variants
2012 / IEEE
By: Bakhouya, M.; Narayana, V.K.; Miaoqing Huang; El-Ghazawi, T.; Gaber, J.;
Optimizing Hardware Design by Composing Utility-Directed Transformations
2012 / IEEE
By: Constantinides, G.A.; Luk, W.; Todman, T.; Qiang Liu;
A State-Space Modeling Approach for the FPGA-Based Real-Time Simulation of High Switching Frequency Power Converters
2012 / IEEE
By: David, J.P.; Ould-Bachir, T.; Blanchette, H.F.;
ANLS: Adaptive Non-Linear Sampling Method for Accurate Flow Size Measurement
2012 / IEEE
By: Yan Chen; Yu Cheng; Jia Tian; Sheng Wang; Bin Liu; Chengchen Hu;
FPGA Implementation for Real-Time Empirical Mode Decomposition
2012 / IEEE
By: Yu-Qing Bao; Ying-Yi Hong;
On-Chip Real-Time Correction for a 20-ps Wave Union Time-To-Digital Converter (TDC) in a Field-Programmable Gate Array (FPGA)
2012 / IEEE
By: Gong, H.; Qi, J.; Liu, Y.;
SET Characterization and Mitigation in 65-nm CMOS Test Structures
2012 / IEEE
By: Rezgui, S.; Tien, J.; Won, R.;
Neutron-Induced Multiple Bit Upsets on Two Commercial SRAMs Under Dynamic-Stress
2012 / IEEE
By: Girard, P.; Dilillo, L.; Galliere, J.-M.; Rech, P.; Griffoni, A.; Saigne, F.; Wrobel, F.; Boch, J.;
Improving SEU Fault Tolerance Capabilities of a Self-Converging Algorithm
2012 / IEEE
By: Velazco, R.; Bui, A.; Sohier, D.; Marques-Costa, G.; Pancher, F.; Mansour, W.;
SEU Recovery Mechanism for SRAM-Based FPGAs
2012 / IEEE
By: Legat, U.; Novak, F.; Biasizzo, A.;
An adaptive bilateral motion estimation algorithm and its hardware architecture
2012 / IEEE
By: Erbagci, B.; Ozcan, Z.; Cetin, M.; Akin, A.; Hamzaoglu, I.;
Performance of the 802.11p Physical Layer in Vehicle-to-Vehicle Environments
2012 / IEEE
By: Borries, K.; Fernandez, J.A.; Fan Bai; Stancil, D.D.; Kumar, B.V.K.V.; Lin Cheng;
Finite-State Machine Motion Controller: Servo Drives
2012 / IEEE
By: Harnik, J.; Horvat, R.; Jezernik, K.;
Spiking Neuron Computation With the Time Machine
2012 / IEEE
By: Harris, J.G.; Shekhar, R.; Garg, V.;
Industrial Laser Cladding Systems: FPGA-Based Adaptive Control
2012 / IEEE
By: Rodriguez-Andina, J.J.; Rodriguez-Araujo, J.; Montealegre, M.A.; Mato, J.L.; Vidal, F.; Farina, J.;
Image Sensor System With Bio-Inspired Efficient Coding and Adaptation
2012 / IEEE
By: Okuno, H.; Yagi, T.;
BioThreads: A Novel VLIW-Based Chip Multiprocessor for Accelerating Biomedical Image Processing Applications
2012 / IEEE
By: Sijung Hu; Echiadis, A.; Jia Zheng; Azorin-Peris, V.; Chouliaras, V.; Stevens, D.;
Toward A Fully Integrated Neurostimulator With Inductive Power Recovery Front-End
2012 / IEEE
By: Mounaim, F.; Sawan, M.;
Design and Implementation of a Predictive Control strategy based on an Industrial Controller
2011 / IEEE
By: Torre, M.; Granado, E.;
A Repetitive Solid State Marx-Type Pulsed Power Generator Using Multistage Switch-Capacitor Cells
2012 / IEEE
By: Akiyama, H.; Akiyama, M.; Nami, A.; Sakamoto, T.;
Closed-Loop Digital Predistortion System With Fast Real-Time Adaptation Applied to a Handset WCDMA PA Module
2012 / IEEE
By: Presti, C.D.; Asbeck, P.M.; Kimball, D.F.;
Implementation of QRD-RLS algorithm on FPGA. Application to Noise Canceller System
2011 / IEEE
By: Martinez, M.E.I.;
A Pay-per-Use Licensing Scheme for Hardware IP Cores in Recent SRAM-Based FPGAs
2012 / IEEE
By: Schellekens, D.; Maes, R.; Verbauwhede, I.;
A Fully Digital Controller of High-Voltage Power Supply for ECRH System on HL-2A
2012 / IEEE
By: Xiaohui Mao; Yingqiao Wang; Lieying Yao; Qing Li; Yali Wang;
Teching/Learning Methods for Embedded Systems Using Copyleft Hardware
2011 / IEEE
By: Bareno, C.;
A Robust Physical Unclonable Function With Enhanced Challenge-Response Set
2012 / IEEE
By: Schaumont, P.; Inyoung Kim; Maiti, A.;
ALMmap: Technology Mapping for FPGAs With Adaptive Logic Modules
2012 / IEEE
By: Wai-Kei Mak; Shao-Huan Wang; Tien-Yu Kuo; Yu-Yi Liang;
An FPGA-Based Hardware Implementation of Configurable Pixel-Level Color Image Fusion
2012 / IEEE
By: Fragoulis, N.; Tsagaris, V.; Besiris, D.; Theoharatos, C.;
A Shifted SVPWM Method to Control DC-Link Resonant Inverters and Its FPGA Realization
2012 / IEEE
By: Sanbo Pan; Zuohua Tian; Junmin Pan;
synASM: A High-Level Synthesis Framework With Support for Parallel and Timed Constructs
2012 / IEEE
By: Patel, H.D.; Sinha, R.;
Accelerating FPGA Routing Through Parallelization and Engineering Enhancements Special Section on PAR-CAD 2010
2012 / IEEE
By: Anderson, J.H.; Gort, M.;
Multichannel Pulse-Coupled-Neural-Network-Based Color Image Segmentation for Object Detection
2012 / IEEE
By: Wei-Yun Yau; Kay-Soon Low; Hualiang Zhuang;
Fully FPGA-Based Sensorless Control for Synchronous AC Drive Using an Extended Kalman Filter
2012 / IEEE
By: Maalouf, A.; Monmasson, E.; Idkhajine, L.;

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