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Topic: Design Space Points

Results

Parameterized sensitivity analysis of multiport systems by means of the partial element equivalent circuit method and interpolation schemes

2011 / IEEE / 978-1-61284-978-2
By: Ferranti, F.; De Camillis, L.; De Zutter, D.; Vande Ginste, D.; Antonini, G.;

Exploiting binary translation for fast ASIP design space exploration on FPGAs

2012 / IEEE / 978-1-4577-2145-8
By: Meloni, P.; Pomata, S.; Lindwer, M.; Raffo, L.; Tuveri, G.;

Enabling fast Network-on-Chip topology selection: an FPGA-based runtime reconfigurable prototyper

2010 / IEEE / 978-1-4244-6471-5
By: Meloni, P.; Raffo, L.; Secchi, S.;

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