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Topic: Cmos Analog Integrated Circuits

Results

Susceptibility of CMOS Voltage Comparators to Radio Frequency Interference
2012 / IEEE
By: Fiori, F.;
A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications
2012 / IEEE
By: Chang, M.-C.F.; Yen-Hsiang Wang; Yen-Cheng Kuan; Zhiwei Xu; I-Ning Ku;
Transmitter Predistortion for Simultaneous Improvements in Bit Rate, Sensitivity, Jitter, and Power Efficiency in 20 Gb/s CMOS-Driven VCSEL Links
2012 / IEEE
By: Kash, J.A.; Baks, C.W.; Doany, F.E.; Lee, B.G.; Schow, C.L.; Rylyakov, A.V.;
Terabit/s-Class Optical PCB Links Incorporating 360-Gb/s Bidirectional 850 nm Parallel Optical Transceivers
2012 / IEEE
By: Doany, F.E.; Kash, J.A.; Lee, B.G.; Budd, R.A.; Baks, C.W.; Tsang, C.K.; Knickerbocker, J.U.; Dangel, R.; Chan, B.; How Lin; Carver, C.; Jianzhuang Huang; Berry, J.; Bajkowski, D.; Libsch, F.; Schow, C.L.;
25-Gb/s 6.5-pJ/bit 90-nm CMOS-Driven Multimode Optical Link
2012 / IEEE
By: Kash, J.A.; Doany, F.E.; Baks, C.; Rylyakov, A.V.; Schow, C.L.;
Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulators
2012 / IEEE
By: Spitale, E.; Palumbo, G.; Giustolisi, G.;
An Ultralow-Power Low-Voltage Class-AB Fully Differential OpAmp for Long-Life Autonomous Portable Equipment
2012 / IEEE
By: Medrano, N.; Celma, S.; Valero Bernal, M.R.; Calvo, B.;
A Low-Power and High-Precision Programmable Analog Filter Bank
2012 / IEEE
By: Rumberg, B.; Graham, D.W.;
Random Pulsewidth Matching Frequency Synthesizer With Sub-Sampling Charge Pump
2012 / IEEE
By: Jun-Ren Su; Chia-Min Chen; Te-Wen Liao; Chung-Chih Hung;
A 9.7 mW 0.13 �m CMOS PLL for use in wireless sensor nodes
2011 / IEEE / 978-1-61284-857-0
By: Weigel, R.; Fischer, G.; Ussmueller, T.; Ferizi, A.; Jung, M.;
Design considerations on CMOS limiting amplifiers for wearable biomedical systems
2011 / IEEE / 978-1-4577-0618-9
By: Ausin, J.L.; Ramos, J.; Torelli, G.; Duque-Carrillo, J.F.;
A divide-by-three regenerative frequency divider using a subharmonic mixer
2011 / IEEE / 978-1-4577-0516-8
By: Jackson, B.R.; Saavedra, C.E.;
A 1.2-V 250-MS/s 8-bit pipelined ADC in 0.13-�m CMOS
2011 / IEEE / 978-1-61284-193-9
By: Di Fang; Wei Lang; Peiyuan Wan; Pingfen Lin; Wei Cui;
Low temperature coefficient CMOS voltage reference based on subthreshold operation
2012 / IEEE / 978-81-909042-2-3
By: Sambasiva Rao, G.; PhaniKumar, Y.;
A Pipelined ADC With Metastability Error Rate $<$10 $^{-15}$ Errors/Sample
2012 / IEEE
By: Hurst, P.J.; Guhados, S.; Lewis, S.H.;
A Third-Order DT $\Delta\Sigma$ Modulator Using Noise-Shaped Bi-Directional Single-Slope Quantizer
2011 / IEEE
By: Un-Ku Moon; Maghari, N.;
A 4 GHz Continuous-Time $\Delta\Sigma$ ADC With 70 dB DR and $-$74 dBFS THD in 125 MHz BW
2011 / IEEE
By: Breems, L.J.; Bolatkale, M.; Makinwa, K.A.A.; Rutten, R.;
A Self-Amplifying Four-Transistor MOSFET Mismatch Test Structure
2013 / IEEE
By: Braswell, B.; Zunino, M.; McAndrew, C. C.;
High performance CMOS buffer amplifier with offset cancellation
2013 / IEEE
By: Farag, Fathi A.;
Development and implementation of a configurable quadrant photodetector
2014 / IEEE
By: Medina, Alfonso; Esper-Chain, Roberto; Sendra, Jose R.;
CMOS class-AB tunable voltage-feedback current operational amplifier
2014 / IEEE
By: Esparza-Alfaro, Fermin; Permisi, Salvatore; Palumbo, Gaetano; Lopez-Martin, Antonio J.;
Optimization of integrated dickson voltage-multipliers for RF energy harvesting
2014 / IEEE
By: Bergeret, Emmanuel; Michelon, Dino; Pannier, Philippe; Di Giacomo, Antonio;
A 6-bit, 1-GS/s, 9.9-mW, Interpolated Subranging ADC in 65-nm CMOS
2014 / IEEE
By: Hoshino, M.; Isogai, M.; Yoshioka, M.; Danjo, T.; Tsukamoto, S.;
A Sizing Methodology for On-Chip Switched-Capacitor DC/DC Converters
2014 / IEEE
By: Flandre, D.; De Vos, J.; Bol, D.;
An SOI structure for flash A/D converter
1988 / IEEE
By: Horiba, Y.; Akasaka, Y.; Yazawa, N.; Nishimura, T.; Kusunoki, S.; Nakaya, M.; Kumamoto, T.;
CMOS analog front end of a transceiver with digital echo cancellation for ISDN
1988 / IEEE
By: Roessler, B.; Wolter, E.;
A physical parametric transistor model for CMOS circuit simulation
1988 / IEEE
By: Mihran, T.G.; Franz, A.F.; Yu, S.;
On a new CMOS resistor implementation for linear analog IC signal processing applications
1988 / IEEE
By: VanPeteghem, P.M.; Rice, G.L.;
VLSI architectures for associative networks
1988 / IEEE
By: Ruckert, U.; Goser, K.;
Analog CMOS circuits for ISDN
1988 / IEEE
By: Smolka, G.J.;
An interactive layout generation tool for CMOS analog ICs
1988 / IEEE
By: Hochet, B.; Declercq, M.; Piguet, S.; Kayal, M.;
Reverse-voltage protection methods for CMOS circuits
1989 / IEEE
By: Bruun, E.;
ILAC: an automated layout tool for analog CMOS circuits
1989 / IEEE
By: Schwarz, T.R.; Litsios, J.B.; Rijmenants, J.; Degrauwe, M.G.R.;
Compact high-frequency output buffer for testing of analog CMOS VLSI circuits
1989 / IEEE
By: Duque-Carrillo, J.F.; Van Peteghem, P.M.;
Knowledge-based analog circuit synthesis with flexible architecture
1988 / IEEE / 0-8186-0872-2
By: Li, Y.-N.; Chen, D.J.; Fung, A.H.; Sheu, B.J.;
Towards an analog system design environment
1989 / IEEE
By: Goffart, B.L.A.G.; Degrauwe, M.G.R.; Pardoen, M.D.; Schwarz, T.R.; Meyvaert, M.K.C.M.; Pierre, M.L.A.; Meixenberger, C.; Dijkstra, E.; Nys, O.J.A.P.; Rijmenants, J.; Litsios, J.B.; Joss, B.;
Design and analysis of CMOS analog signal processing circuits by means of a graphical MOST model
1989 / IEEE
By: Wallinga, H.; Bult, K.;
Fully integrated analog telephone
1989 / IEEE
By: Rabaey, D.; Willocx, E.; Moons, E.D.J.;
A 50 dB variable gain amplifier using parasitic bipolar transistors in CMOS
1989 / IEEE
By: Pan, T.-W.; Abidi, A.A.;
1.5 mu m CMOS gate arrays with analog/digital macros designed using common base arrays
1989 / IEEE
By: Kawada, S.; Hara, Y.; Isono, T.; Inuzuka, T.;
Analog CMOS integrated circuit design: research and undergraduate teaching
1989 / IEEE
By: Rao, R.; Anagnostopoulos, C.; Tschang, P.; Chung, J.K.; Halverson, R.; Valdenaire, P.; Jorgenson, R.; Portmann, C.; Smith, M.J.S.; Mattos, D.W.; Ching, H.;
n/sup +/-poly-to-n/sup +/-silicon capacitor structures for single-poly analog CMOS and BiCMOS processes
1989 / IEEE
By: Liou, T.-I.; Teng, C.-S.;
Analysis of the saturation properties of polysilicon emitter transistor for the BiCMOS VLSI design
1989 / IEEE
By: Srivastava, A.;
Project AX: an automatic schematic design system. I. Interactive transistor placement
1989 / IEEE / 0-8186-1918-x
By: Lau, K.M.; Qiu, J.Z.; Wu, C.-L.;
Trimming analog circuits using floating-gate analog MOS memory
1989 / IEEE
By: Carley, L.R.;
ISAAC: a symbolic simulator for analog integrated circuits
1989 / IEEE
By: Sansen, W.M.C.; Walscharts, H.C.C.; Gielen, G.G.E.;
A single-chip 2B1Q U-interface transceiver
1989 / IEEE
By: Ahdab, A.T.; Hunt, G.; Gervais, R.A.; Colbeck, R.P.; Kurowski, C.W.;
A CMOS neural network for pattern association
1989 / IEEE
By: Walker, M.; Akers, L.; Hasler, P.;
A symbolic simulator for analog circuits
1989 / IEEE
By: Glelen, G.; Sansen, W.; Walscharts, H.;
A single-chip 2B1Q U-interface transceiver
1989 / IEEE
By: Gervais, R.; Colbeck, R.; Kurowski, C.; Ahdab, A.; Hunt, G.;
A novel CMOS magnetic field sensor array
1990 / IEEE
By: Misra, D.;
A single-chip CMOS analog/digital mixed NTSC decoder
1990 / IEEE
By: Hino, Y.; Kobayashi, O.; Sugihara, K.; Asami, F.; Akiba, T.; Tahara, N.; Kohiyama, K.; Ohta, M.;
'Merged' technologies: present capabilities and value for applications in high-voltage and 'smart power' circuitry
1990 / IEEE
By: Emerald, P.R.;
Switched-current circuit design issues
1991 / IEEE
By: Allstot, D.J.; Liang, G.; Fiez, T.S.;
A high-frequency fully differential BiCMOS operational amplifier
1991 / IEEE
By: Reif, R.L.; Lee, H.-S.; Wang, J.Y.A.; O, K.K.; Karanicolas, A.N.;
An active resistor network for Gaussian filtering of images
1991 / IEEE
By: Kobayashi, H.; Abidi, A.A.; White, J.L.;
An overview of smart power technology
1991 / IEEE
By: Baliga, B.J.;
A positive-feedback transconductance amplifier with applications to high-frequency, high-Q CMOS switched-capacitor filters
1988 / IEEE
By: Laber, C.A.; Gray, P.R.;
An analog trimming circuit based on a floating-gate device
1988 / IEEE
By: Guggenbuhl, W.; Sackinger, E.;
SIGFRED: a low-power DTMF and signaling frequency detector
1991 / IEEE
By: Mulder, J.; Becker, R.;
Design of compact high-frequency output buffer for testing of analog CMOS VLSI circuits
1989 / IEEE
By: Duque-Carrillo, J.F.; VanPeteghem, P.M.; Liu, H.H.;
Full stacked layout of analogue cells
1989 / IEEE
By: Liberali, V.; Maloberti, F.; Gatti, U.;
Nonlinear time-domain macromodeling of OTA circuits
1989 / IEEE
By: Perez-Verdu, B.; Sanchez-Sinencio, E.; Huertas, J.L.; Rodriguez-Vazquez, A.; Linares-Barranco, B.; Cruz, J.;
Fault modeling of physical failures in CMOS VLSI circuits
1990 / IEEE
By: Gobovic, D.; Zaghloul, M.E.;
Implementation of analog ICs based on neural networks
1989 / IEEE
By: Smith, M.J.S.;
CMOS amplifier design with enhanced slew rate and power supply rejection
1989 / IEEE
By: Lee, B.W.; Sheu, B.J.;
A multichannel minimum-seeking analog-to-digital converter
1990 / IEEE
By: Miller, D.G.; Ternus, J.; Zrudsky, D.R.;
Analog CMOS synaptic learning circuits adapted from invertebrate biology
1991 / IEEE
By: Schneider, C.; Card, H.;
A CMOS switched-current filter technique
1990 / IEEE
By: Allstot, D.; Fiez, T.;
Circuit design and performance for large area electronics
1990 / IEEE
By: Bruce, R.; Lewis, A.;
Analog circuit techniques utilizing BiCMOS technology
1990 / IEEE
By: Singer, L.;
Design of neural network systems from custom analog VLSI chips
1990 / IEEE
By: Wang, Y.; Salam, F.M.A.;
Design of modifiable-weight synapse CMOS analog cell
1990 / IEEE
By: Zaghloul, M.E.; Ibrahim, F.;
Sampled data analog signal processor
1990 / IEEE
By: Siferd, R.; Jundi, K.;
A CMOS transconductance-C filter technique for very high frequencies
1992 / IEEE
By: Nauta, B.;
The effect of temperature on lateral DMOS transistors in a power IC technology
1992 / IEEE
By: Hill, K.E.; Nostrand, G.E.; Dolny, G.M.;
Analog CMOS implementation of a multilayer perceptron with nonlinear synapses
1992 / IEEE
By: Guggenbuhl, W.; Lont, J.B.;
Simple CMOS analog square-rooting and squaring circuits
1992 / IEEE
By: Baltes, H.P.; Filanovsky, I.M.;
High frequency analog signal processing circuits based on a CMOS transconductor
1990 / IEEE / 0-7803-0081-5
By: Singh, S.P.; Vlach, J.; Hanson, J.V.;
Analog neural programmable optimizers in CMOS VLSI technologies
1992 / IEEE
By: Rodriguez-Vazquez, A.; Dominguez-Castro, R.; Sanchez-Sinencio, E.; Huertas, J.L.;
P-JFET on SIMOX for rad-hard analog devices
1990 / IEEE / 0-87942-573-3
By: Bonaime, J.; Blanc, J.P.; Montaron, J.; Martin, J.L.; Dupont-Nivet, E.; Truche, R.; de Pontcharra, J.; Gautier, J.; Delevoye, E.;
A parallel signal processing technique using MOS current-mode analog circuits for smart image sensors
1991 / IEEE / 0-87942-585-7
By: Takahashi, J.; Kawahito, S.; Nakamura, T.; Ashiki, M.;
CMOS implementation of analog Hebbian synaptic learning circuits
1991 / IEEE / 0-7803-0164-1
By: Schneider, C.; Card, H.;
A parallel analog CCD/CMOS neural network IC
1991 / IEEE / 0-7803-0164-1
By: Neugebauer, C.F.; Yariv, A.;
An adaptive CMOS matrix-vector multiplier for large scale analog hardware neural network applications
1991 / IEEE / 0-7803-0164-1
By: Neugebauer, C.F.; Cauwenberghs, G.; Yariv, A.;
A CMOS UV-programmable non-volatile synaptic array
1991 / IEEE / 0-7803-0164-1
By: Benson, R.; Tawel, R.; Thakoor, A.P.;
An analog integrated speech front-end based on the auditory periphery
1991 / IEEE / 0-7803-0164-1
By: Andreou, A.G.; Liu, W.; Goldstein, M.H., Jr.;
A simple L-C equalizer for use in magnetic storage read channels
1991 / IEEE / 0-7803-0006-8
By: Gomez, R.; Pai, P.; Abidi, A.A.;
CMOS device modeling for subthreshold circuits
1992 / IEEE
By: Godfrey, M.D.;
A novel CMOS digital clock and data decoder
1992 / IEEE
By: Bazes, M.; Ashuri, R.;
STAIC: a synthesis tool for CMOS and BiCMOS analog integrated circuits
1991 / IEEE / 0-7803-0050-5
By: Elmasry, M.I.; Harvey, J.P.; Leung, B.;
Analysis and design of analog CMOS building blocks for integrated fuzzy inference circuits
1991 / IEEE / 0-7803-0050-5
By: Motomura, T.; Ueno, F.; Inoue, T.; Setoguchi, O.; Matsuo, R.;
STAIC: an interactive framework for synthesizing CMOS and BiCMOS analog circuits
1992 / IEEE
By: Elmasry, M.I.; Harvey, J.P.; Leung, B.;
A probabilistic fault model for 'analog' faults in digital CMOS circuits
1992 / IEEE
By: Favalli, M.; Olivo, P.; Ricco, B.;
A current-mode CMOS algorithmic analog-to-quaternary converter circuit
1992 / IEEE / 0-8186-2680-1
By: Current, K.W.;
Channel-length-independent hot-carrier degradation in analog p-MOS operation
1992 / IEEE
By: Tempel, G.; Broz, M.; Thewes, R.; Goser, K.; Weber, W.;
VLSI implementation of the metering signal generator for switching system analog terminations
1990 / IEEE / 0-8186-2066-8
By: Maloberti, F.; Chiappano, G.; Boarin, G.; Porta, M.; Napolitano, S.;
ADS analog digital system, a novel approach to CAD for mixed analog/digital ASICs
1990 / IEEE / 0-8186-2066-8
By: Remy, J.; Caillon, C.; Scotti, S.; Sanchez, J.M.;
A 10 b 50 MHz pipelined CMOS A/D converter with S/H
1993 / IEEE
By: Yotsuyanagi, M.; Hirata, K.; Etoh, T.;
Computing motion using analog VLSI vision chips: an experimental comparison among four approaches
1991 / IEEE / 0-8186-2153-2
By: Bishofberger, B.; Horiuchi, T.; Bair, W.; Moore, A.; Koch, C.; Lazzaro, J.;

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