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Topic: Circuit Testing

Results

Counting sequences
1981 / IEEE
By: Cohn, M.; Robinson, J.P.;
Estimation of Analog Parametric Test Metrics Using Copulas
2011 / IEEE
By: Stratigopoulos, H.-G.; Mir, S.; Bounceur, A.;
Scan Shift Power of Functional Broadside Tests
2011 / IEEE
By: Pomeranz, I.;
Testing ADC Spectral Performance Without Dedicated Data Acquisition
2012 / IEEE
By: Le Jin; Jingbo Duan; Degang Chen;
On the Switching Activity and Static Test Compaction of Multicycle Scan-Based Tests
2012 / IEEE
By: Pomeranz, I.;
Diagnosis-Assisted Adaptive Test
2012 / IEEE
By: Blanton, R.D.; Xiaochun Yu;
A Static Linear Behavior Analog Fault Model for Switched-Capacitor Circuits
2012 / IEEE
By: Hao-Chiao Hong;
Test Application for Analog/RF Circuits With Low Computational Burden
2012 / IEEE
By: Ozev, S.; Yilmaz, E.;
Efficient Block-Based Parameterized Timing Analysis Covering All Potentially Critical Paths
2012 / IEEE
By: Heloue, K.R.; Najm, F.N.; Onaissi, S.;
NIM-X: A Noise Index Model-Based X-Filling Technique to Overcome the Power Supply Switching Noise Effects on Path Delay Test
2012 / IEEE
By: Heuvalman, W.M.; Majhi, A.K.; Kruseman, B.; Alpaslan, E.; Dworak, J.;
Adaptive Alternate Analog Test
2012 / IEEE
By: Stratigopoulos, H.; Mir, S.;
Test and Diagnosis for Small-Delay Defects (Tehranipoor, M. et al; 2011) [Book review]
2012 / IEEE
Asymmetric Aging and Workload Sensitive Bias Temperature Instability Sensors
2012 / IEEE
By: Reddy, V.; Chen, M.; Cao, Y.; Srinivasan, V.; Krishnan, S.;
Towards Better Quality Assurance of the Electrical Integrity of Superconducting Accelerator Magnets
2012 / IEEE
By: Stafiniak, A.; Siemko, A.;
Simulations and Tests of MCP-BSCCO-2212 Superconducting Fault Current Limiters
2012 / IEEE
By: Polasek, A.; de Sousa, W.T.B.; de Andrade, R.; Jurelo, A.R.; Dias, R.; Silva, F.A.;
Design and Testing of a High-Temperature Superconducting Pulsed-Power Transformer
2012 / IEEE
By: Yu Wang; Haitao Li; Kangle Dou; Liang Dong; Rui Wu; Yingwei Zhu;
New Synthetic Test Circuit for Thyristor Valve in HVDC Converter
2012 / IEEE
By: Chung, Y.; Han, B.; Nho, E.;
Scan Power Reduction for Linear Test Compression Schemes Through Seed Selection
2012 / IEEE
By: Orailoglu, A.; Mingjing Chen;
Impedance meter based on cross-correlation noise measurements
2011 / IEEE / 978-1-4577-0192-4
By: Scandurra, G.; Ciofi, C.;
The design and realization of multi-channel parallel testing system based on FPGA
2011 / IEEE / 978-1-4244-9439-2
By: Yulong Hou; Lina Yu; Yanlu Zheng; Wei Liu; Huixin Zhang;
An improved OBT strategy for untuned continuous-time analog filters
2011 / IEEE / 978-1-4577-1490-0
By: Petrashin, P.; Dualibe, C.;
Design and simulation of temperature measurement circuit based on LabVIEW and Multisim
2011 / IEEE / 978-1-4244-9439-2
By: Runjing Zhou; Zhi Weng;
The study on the test generation of digital circuit on the basis of the GA and the ant colony algorithm
2011 / IEEE / 978-1-4244-9439-2
By: Xun Zhou; Xiaoli Wang;
Power supply noise and ground bounce aware pattern generation for delay testing
2011 / IEEE / 978-1-61284-137-3
By: Todri, A.; Virazel, A.; Pravossoudovitch, S.; Girard, P.; Dilillo, L.; Bosio, A.;
Fault samples simulation based on Monte Carlo method in testability virtual test
2011 / IEEE / 978-1-61284-666-8
By: Jing Qiu; Guanjun Liu; Chenxu Zhao; Yong Zhang;
A proposed sub-threshold OTA-C filter for Hearing Aids
2011 / IEEE / 978-1-61284-137-3
By: Hall, S.; Hasan, S.A.; Marsland, J.S.;
Level-crossing based QAM demodulation for low-cost analog/RF testing
2011 / IEEE / 978-1-61284-137-3
By: Pous, N.; Rivoir, J.; Confais, G.; Latorre, L.; Azais, F.;
On the functional test of MESI controllers
2011 / IEEE / 978-1-4577-1490-0
By: SonzaReorda, M.; Sanchez, E.;
FPGA implementation of 8-bit RISC microcontroller for embedded systems
2011 / IEEE / 978-83-932075-2-7
By: Gal, R.; Kos, A.; Frankiewicz, M.; Golda, A.;
The use of specialized multi-band stimuli for analog circuits testing
2011 / IEEE / 978-83-932075-2-7
By: Jantos, P.; Golonek, T.; Grzechca, D.;
Improving reliability by modifying system configuration
2011 / IEEE / 978-1-4577-0628-8
By: Younes, M.A.; Hassan, D.M.; Khalil, A.M.;
Evaluation of the transient analysis method ability for detecting deviation faults in space environments
2011 / IEEE / 978-1-4577-1236-4
By: Romero, E.A.; Laprovitta, A.M.; Peretti, G.M.; Peralta, J.M.; Marques, C.;
Ultra low-cost configurability test strategy for an embedded analog circuit
2011 / IEEE / 978-1-4577-1236-4
By: Laprovitta, A.M.; Mourad, S.; Romero, E.A.; Peretti, G.M.;
Experience in Short Circuit Testing of LV Short Circuit Testing Transformer
2011 / IEEE / 978-1-4577-0419-2
By: Rao, N.S.M.;
Research on analog circuit fault feature extraction based on FRFT-KPCA method
2011 / IEEE / 978-1-4244-8161-3
By: Sun Jingjie; Sun Weimeng; Zhao Jianjun;
A low-cost DDEM ADC structure for the testing of high-performance DACs
2011 / IEEE / 978-1-61284-857-0
By: Hyeonuk Son; Incheol Kim; Jaewon Jang; Sungho Kang;
A new static test of a DAC with a built-in structure
2011 / IEEE / 978-1-61284-857-0
By: Incheol Kim; Sungho Kang; HyeonUk Son; Jaewon Jang;
Design of nuclear measuring instrument fault diagnosis system based on circuit characteristic test
2011 / IEEE / 978-1-4244-8161-3
By: Ge Shenqi; Zhou Gang; Peng Wei;
Simulated annealing with artificial neural network fitness function for ECG amplifier testing
2011 / IEEE / 978-1-4577-0618-9
By: Grzechca, D.;
Faults test generation algorithm based on threshold for digital circuit
2011 / IEEE / 978-1-61284-722-1
By: Yang Liyuan; Liang Yingchun;
Circuit design for a neuron based on FPAA
2011 / IEEE / 978-1-4577-0321-8
By: Hongyong Li; Zhiming Pan;
Digital circuit crosstalk delay faults test generation based on neural networks
2011 / IEEE / 978-1-4577-0321-8
By: Zhang Jianshu; Zhang Xiuju;
Offline testing of an electronic control module for a regenerative braking drive system
2011 / IEEE / 978-1-4577-2112-0
By: Dumitrescu, C.; Cristescu, C.; Guta, D.I.; Lepadatu, I.;
The design and testing of a new FPGA Data Acquisition System
2011 / IEEE / 978-1-4244-8165-1
By: Yiran Wei; Qingzhi Zhang; Bao, A.; Tao Guo;
A transportability microcosm as an enabler for a family of testers
2011 / IEEE / 978-1-4244-9363-0
By: Marion, R.L.;
Using of pulse signals for DAC testing
2011 / IEEE / 978-80-7043-930-2
By: Fexa, P.; Vedral, J.;
Perturbation on-time (POT) control and inhibit time control (ITC) in suppression of THD of power factor correction (PFC) design
2011 / IEEE / 978-1-4577-0223-5
By: Chia-Lung Ni; Jen-Chieh Tsai; Yi-Ting Chen; Chi-Lin Chen; Chun-Yen Chen; Heng-Lin Pan; Chih-Jen Chen; Ke-Horng Chen;
Fault feature exaction method for the circuit based on Haar wavelet filter banks
2011 / IEEE / 978-1-4244-8161-3
By: Feng Bing; Li Jimin; Meng Xianguo; Yang Zhen;
Information fusion feature preprocessor based on FRFT for analog circuits fault diagnosis
2011 / IEEE / 978-1-4244-8161-3
By: Jiang Yuanyuan; Lin Hua; Youren Wang; Luo Hui;
Analyses and solutions to unsafe testing states from boundary scan testing
2011 / IEEE / 978-1-4244-8161-3
By: Xu Simao; Deng Xiaopeng;
Analog circuit fault diagnosis approach using optimized SVMs based on MST algorithm
2011 / IEEE / 978-1-4244-8161-3
By: Liu Hong; Wang Houjun; Jiang Shuyan; Song Guoming;
Performance testing of Surge Protective Devices for low-voltage AC power circuits: Approach of the IEEE
2011 / IEEE / 978-1-4577-1002-5
By: Hotchkiss, R.W.;
Web-service based framework for testing automatic amplitude-frequency characteristic of filter
2011 / IEEE / 978-1-4244-8161-3
By: Zhou Juan; Wang Yi; Shao Qingyi; Chen Bingyan;
Design of an eFuse OTP memory of 8 bits based on a 0.35�m BCD process
2011 / IEEE / 978-89-88678-61-9
By: Ji-Hye Jang; Liyan Jin; Dong-Hoon Lee; In-Hwa Choi; Young-Bae Park; Young-Hee Kim; Pan-Bong Ha;
New on-line testing methods for approximate data processing in the computing circuits
2011 / IEEE / 978-1-4577-1425-2
By: Drozd, A.; Antoshchuk, S.;
Sine-fitting by the energy-based method in the dynamic testing of ADCs
2011 / IEEE / 978-1-4577-1425-2
By: Dallet, D.; Petri, D.; Belega, D.;
Developing automated data acquisition system for ADC and DAC testing
2011 / IEEE / 978-1-4577-1425-2
By: Fexa, P.; Vedral, J.;
Investigation of histogram method implementation for high resolution ADC testing
2011 / IEEE / 978-1-4577-1425-2
By: Kochan, O.; Kochan, R.; Chyrka, M.; Sapojnyk, G.;
Diagnostic information based test points selection for analog circuit diagnosis
2011 / IEEE / 978-1-61284-200-4
By: Zhang Fan; Wan Jiuqing;
Simple analog motion detection circuit based on the retina
2011 / IEEE / 978-1-61284-200-4
By: Nishio, K.; Asahina, H.;
Online Fault Detection in Reversible Logic
2011 / IEEE / 978-1-4577-1713-0
By: Rice, J.E.; Nayeem, N.M.;
Research and design preamplifier circuit of atmospheric electric field meter
2011 / IEEE / 978-1-4577-1466-5
By: Liangfu Li; Yuxue Huang; Zaihua Guo;
10/350�s Crowbar impulse current test system
2011 / IEEE / 978-1-4577-1466-5
By: Jian Xue; Mi Zhou; Jianguo Wang; Li Cai;
Parametric fault diagnosis using overdetermined system of fault equations
2011 / IEEE / 978-1-4577-1694-2
By: Kolka, Z.; Kincl, Z.;
Advanced scan chain configuration method for broadcast decompressor architecture
2011 / IEEE / 978-1-4577-1958-5
By: Chloupek, M.; Novak, O.; Jenicek, J.;
Test set compaction procedure for combinational circuits based on decomposition tree
2011 / IEEE / 978-1-4577-1958-5
By: Andreeva, V.;
A contribution to testing of fiscal memories
2011 / IEEE / 978-1-4577-1498-6
By: Barac, D.;
Accurate signature driven power conscious tuning of RF systems using hierarchical performance models
2011 / IEEE / 978-1-4577-0152-8
By: Devarakond, S.; Sen, S.; Banerjee, A.; Chatterjee, A.;
Total dose and single event testing of the Intersil ISL70227RH low-noise operational amplifier
2011 / IEEE / 978-1-4577-0586-1
By: Thomson, E.T.; Hood, R.; Pearce, L.G.; van Vonno, N.W.; Chesley, P.J.; Bernard, T.M.;
Test clock domain optimization for peak power supply noise reduction during scan
2011 / IEEE / 978-1-4577-0152-8
By: Min-Hsiu Tsai; Ming-Tung Chang; Li, J.C.-M.; Kuan-Yu Liao; Chih-Mou Tseng; Yu-Chuan Huang; Jen-Yang Wen; Min-Hong Tsai; Hung-Chun Li;
Real-time testing method for 16 Gbps 4-PAM signal interface
2011 / IEEE / 978-1-4577-0152-8
By: Ichiyama, K.; Ishida, M.; Okayasu, T.; Kawabata, M.; Watanabe, D.;
Testing of one stage Pipelined Analog to Digital Converter
2011 / IEEE / 978-1-4577-0128-3
By: Abdelhalim, M.B.; Khalil, A.H.; Hamed, S.M.; Madian, A.H.; Amer, H.H.;
WTM based reordering of combine test vector & output response using Dijkstra algorithm for scan power reduction
2011 / IEEE / 978-1-4577-2168-7
By: Parmar, H.; Mehta, U.; Ruparelia, S.;
Testing of SF6- and vacuum generator circuit breakers
2011 / IEEE / 978-1-4577-1272-2
By: Smeets, R.P.P.; te Paske, L.H.;
Improved coefficient based test for diagnosing parametric faults of analog circuits
2011 / IEEE / 978-1-4577-0255-6
By: Manikandan, V.; Kavithamani, A.; Ramakrishnan, K.; Devarajan, N.;
Fault detection and diagnoses methodology for adaptive digitally-calibrated pipelined ADCs
2011 / IEEE / 978-1-4673-0469-6
By: Abbas, M.;
Distributed Comparison Test Driven Multiprocessor Speed-Tuning: Targeting Performance Gains under Extreme Process Variations
2011 / IEEE / 978-1-4577-1984-4
By: Wells, J.; Natarajan, J.; Singh, A.; Chatterjee, A.;
Diagnostic Test of Robust Circuits
2011 / IEEE / 978-1-4577-1984-4
By: Indlekofer, T.; Hellebrand, S.; Cook, A.; Wunderlich, H.;
An Accurate Timing-Aware Diagnosis Algorithm for Multiple Small Delay Defects
2011 / IEEE / 978-1-4577-1984-4
By: Nan-Hsin Tseng; Li, J.C.-M.; Wei-Li Hsu; Po-Juei Chen; Liu, C.C.C.; Wei-pin Changchien; Kuo-Yin Chen;
Low Power Test-Compression for High Test-Quality and Low Test-Data Volume
2011 / IEEE / 978-1-4577-1984-4
By: Kavousianos, X.; Tenentes, V.;
SSTKR: Secure and Testable Scan Design through Test Key Randomization
2011 / IEEE / 978-1-4577-1984-4
By: Razzaq, M.A.; Singh, A.; Singh, V.;
Test and Diagnosis of Analog Circuits Using Moment Generating Functions
2011 / IEEE / 978-1-4577-1984-4
By: Sindia, S.; Singh, V.; Agrawal, V.D.;
Efficient SAT-Based Search for Longest Sensitisable Paths
2011 / IEEE / 978-1-4577-1984-4
By: Polian, I.; Czutro, A.; Jie Jiang; Sauer, M.; Becker, B.;
Synthesis of Reversible Universal Logic around QCA with Online Testability
2011 / IEEE / 978-1-4577-1880-9
By: Sikdar, B.K.; Saha, M.; Saran, D.; Sen, B.;
Quality Control for High-Speed Digital Multi-layer Printed Circuit Board
2011 / IEEE / 978-1-4577-1419-1
By: Yan Jia; Wenlu Chen; Ningbiao Wu; Yonghua Zhang;
Efficient diagnosable design of the IEEE P1500 architecture for SoC testing
2011 / IEEE / 978-1-4673-0498-6
By: Hsin-Chou Chi; Chih-Ling Yang; Hsi-Che Tseng;
Design of trigger test board for the Daya Bay neutrino experiment
2011 / IEEE / 978-1-4673-0120-6
By: Chen Shao-min; Xue Tao; Gong Guanghua; Gong Hui; Wang Xi; Shao Bei-bei;
Augmenting Functional Broadside Tests for Transition Fault Coverage with Bounded Switching Activity
2011 / IEEE / 978-1-4577-2005-5
By: Pomeranz, I.;
Test Generation and Computational Complexity
2011 / IEEE / 978-1-4577-2005-5
By: Sziray, J.;
Mixed symbolic-numerical techniques in fault diagnosis using fault rubber stamps
2011 / IEEE / 978-1-4577-1846-5
By: Al-Jewad, B.Z.; Al-Naima, F.M.;
ADC and DAC Testing Using Impulse Signals
2011 / IEEE / 978-0-7695-4479-3
By: Fexa, P.; Vedral, J.;
Trim DAC Design with Minimum DNL for Self-Trim with Self-Test Schemes
2011 / IEEE / 978-0-7695-4479-3
By: von Staudt, H.M.;
Low-Distortion Single-Tone and Two-Tone Sinewave Generation Algorithms Using an Arbitrary Waveform Generator
2011 / IEEE / 978-0-7695-4479-3
By: Miyashita, H.; Wakabayashi, K.; Gake, T.; Yano, Y.; Rikino, K.; Kishigami, S.; Yamada, T.; Niitsu, K.; Kobayashi, H.; Kato, K.; Kobayashi, O.; Uemori, S.;
A Test Method for Power Management of SoC-based Microprocessors
2011 / IEEE / 978-1-4577-2101-4
By: Youngho Ahn; Young-Si Hwang; Daecheol You; Ki-Seok Chung;
PPM-accuracy Error Estimates for Low-Cost Analog Test: A Case Study
2011 / IEEE / 978-0-7695-4479-3
By: Drineas, P.; Stratigopoulos, H.; Makris, Y.; Kupp, N.;
Arbitrary Waveform Generator Response Shaping Method to Enable ADC Linearity Testing on Very Low Cost Automatic Test Equipment
2011 / IEEE / 978-0-7695-4479-3
By: Dasnurkar, S.D.; Abraham, J.A.;
Decreasing SoC Test Power Dissipation and Test Data Volume Based on Pattern Recombination
2011 / IEEE / 978-1-4577-2135-9
By: Chunlei Mei; Zhifei Shen; Maoxiang Yi;
Optimization of IQ mismatch test
2011 / IEEE / 978-1-4577-1982-0
By: Tay Eng Boon; Goh Swee Heng;
Analog fault diagnosis by inverse problem technique
2011 / IEEE / 978-1-4577-2209-7
By: Madian, A.H.; Radwan, A.G.; Ahmed, R.F.; Soliman, A.M.;
A method for fault diagnosis of analog circuit based on rough set
2011 / IEEE / 978-1-4577-0888-6
By: Li Ning; Wu Lichun; Sun Lijie; Zhang Li;

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