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An adaptive CMOS imager with time-based compressive active-pixel response

By: Chakrabartty, S.; Kucher, P.;

2006 / IEEE / 0-7803-9389-9

Description

This item was taken from the IEEE Conference ' An adaptive CMOS imager with time-based compressive active-pixel response ' This paper presents an alternative to a logarithmic response CMOS imager that utilizes an in-pixel, time-based compressive map for capturing scenes with wide dynamic range. The imager employs a correlated double sampling technique that significantly reduces the effects of parasitic capacitance and mismatch in active-pixel circuits. An on-line adaptation technique that adjusts the parameter of the compressive map compensates for variable illumination conditions across different scenes, achieving large dynamic range. The proposed pixel architecture and algorithm have been implemented with relatively few transistors and with a fill factor of 17%. An imager consisting of an array of 110 /spl times/ 80 pixels has been designed and fabricated using a 0.5/spl mu/m CMOS process. Simulation and preliminary testing results demonstrate the functionality of the imager to adapt its response under different illumination conditions.