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A Control Theoretic Approach to Run-Time Energy Optimization of Pipelined Processing in MPSoCs
By: Carta, S.; Acquaviva, A.; Alimonda, A.; Pisano, A.;
2006 / IEEE / 3-9810801-1-4
Description
This item was taken from the IEEE Conference ' A Control Theoretic Approach to Run-Time Energy Optimization of Pipelined Processing in MPSoCs ' In this work we take a control-theoretic approach to feedbackbased dynamic voltage scaling (DVS) in Multi Processor System on Chip (MPSoC) pipelined architectures. We present and discuss a novel feedback approach based on both linear and non-linear techniques aimed at controlling interprocessor queue occupancy. Theoretical analysis and experiments, carried out on a cycleaccurate multiprocessor simulation platform, show that feedbackbased control reduces energy consumption with respect to standard local DVS policies and highlight that non-linear strategies allows a more flexible and robust implementation in presence of variable workload conditions.
Related Topics
Logic Design
Microprocessor Chips
Multiprocessing Systems
Pipeline Processing
Pipelined Architectures
Run-time Energy Optimization
Feedback-based Dynamic Voltage Scaling
Multiprocessor System On Chip
Interprocessor Queue Occupancy Controlling
Multiprocessor Simulation Platform
Feedback-based Control
Runtime
Frequency
Voltage Control
Control Systems
Dynamic Voltage Scaling
Queueing Analysis
Linear Feedback Control Systems
Feedback Control
Proportional Control
Clocks
Clocks
Circuit Optimisation
Circuit Feedback
System-on-chip
Engineering
Pipelined Processing
