Your Search Results

Use this resource - and many more! - in your textbook!

AcademicPub holds over eight million pieces of educational content for you to mix-and-match your way.

Experience the freedom of customizing your course pack with AcademicPub!
Not an educator but still interested in using this content? No problem! Visit our provider's page to contact the publisher and get permission directly.

Developing a transient induced latch-up standard for testing integrated circuits

By: Chaine, M.; Weiss, G.; Barth, J.; Henry, L.G.; Kelly, M.; Gieser, H.; Hatchard, C.; Morgan, I.; Gross, V.; Meuse, T.; Bonfert, D.;

1999 / IEEE / 1-58637-007-X

Description

This item was taken from the IEEE Conference ' Developing a transient induced latch-up standard for testing integrated circuits ' This paper presents the results of a search for a more effective stimulus suitable for assessing the latch-up susceptibility of integrated circuits. Different transient stimuli and amplitudes were found to have varying effectiveness in creating a latch event. The investigation also identified the inadequate response and recovery of existing test system power supplies and need for appropriate isolation techniques.