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Retiming and clock skew for synchronous systems
By: Hsing-Mean Sha; Liang-Fang Chao;
1994 / IEEE / 0-7803-1915-X
Description
This item was taken from the IEEE Periodical ' Retiming and clock skew for synchronous systems ' Retiming and clock skew are both timing optimization methods for synchronous circuitry but are usually applied separately. We use the concept of scheduling to form a common background in the formulation of retiming and clock skew, and to study the interplay between, retiming and clock skew. A methodology to optimise synchronous circuitry with both retiming and clock skew is proposed.<
Related Topics
Scheduling
Synchronisation
Optimisation
Logic Design
Scheduling
Retiming
Clock Skew
Timing Optimization Methods
Synchronous Circuitry
Clocks
Processor Scheduling
Circuit Testing
Chaos
Timing
Flip-flops
Propagation Delay
Flow Graphs
Marine Vehicles
Design Automation
Timing
Logic Circuits
Engineering
Synchronous Systems
