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Fast and accurate on-wafer extraction of parasitic resistances in GaAs MESFET's
By: Debie, P.; De Zutter, D.; Martens, L.;
1994 / IEEE / 0-7803-1757-2
This item was taken from the IEEE Periodical ' Fast and accurate on-wafer extraction of parasitic resistances in GaAs MESFET's ' A new and accurate method for extracting parasitic resistance values of GaAs MESFET's is presented. The technique makes use of only three simple DC measurements. Simulation and measurement results show that this new extraction method is very accurate compared to other currently used methods. As the same test device can be used for full characterisation of the MESFET's, this method does not require additional test structures. Using our extraction method, excellent agreement between simulated and measured S-parameters for a small-signal equivalent circuit MESFET model was found, so it is very appropriate for device and circuit modelling purposes. The presented extraction method is implemented in HP-ICCAP, a software tool for parameter extraction. In addition, all the measurements are controlled by this software, so a high level of automation is obtained.<
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Electronic Engineering Computing