Your Search Results

Use this resource - and many more! - in your textbook!

AcademicPub holds over eight million pieces of educational content for you to mix-and-match your way.

Experience the freedom of customizing your course pack with AcademicPub!
Not an educator but still interested in using this content? No problem! Visit our provider's page to contact the publisher and get permission directly.

ITER blanket and shield studies for high aspect ratio design option

By: Lousteau, D.; Smith, D.L.; Williamson, D.; Raffray, A.; Badawi, A.; Ying, A.; Abdou, M.; El-Guebaly, L.; Sawan, M.; Sviatoslavsky, I.; Mogahed, E.; Kulcinski, G.; Nelson, B.; Mattas, R.; Majumdar, S.; Kopasz, J.; Johnson, C.; Billone, M.; Attaya, H.; Gohar, Y.;

1991 / IEEE / 0-7803-0132-3


This item was taken from the IEEE Periodical ' ITER blanket and shield studies for high aspect ratio design option ' The impact of the HARD (high aspect ratio design) option on the blanket and shield performance as concluded from CDA (conceptual design activity) is examined. The neutron wall load distributions were calculated for the different operating modes of HARD. The average neutron wall load over the test ports is 30 to 70% higher than CDA, which increases the testing capability of ITER. The net tritium breeding capability of HARD was calculated based on the use of CDA blanket design. The net tritium breeding ratio is 8% less than CDA. However, the increased average neutron wall load over the test sections overrides the impact on the external tritium supply because of shorter operating time for the same neutron fluence. The shielding analysis of HARD suggested several modifications to meet the design limits of CDA. The total inboard thickness at midplane should be restored to 84 cm with the vacuum gap between the shield and the vacuum vessel reduced to 2 cm as in CDA, or 86 cm inboard thickness with the current gap thickness of 4 cm. In addition, it is necessary to extend the upper parts of the side modules to provide extra shielding for the upper divertor region.<>