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High-Performance Poly-Si TFTs Using Ultrathin $\hbox{HfSiO}_{x}$ Gate Dielectric for Monolithic Three-Dimensional Integrated Circuits and System on Glass Applications

By: Luo, G.-L.; Chen, K.-J.; Yang, M.-J.; Wu, S.L.; Lee, M.H.; Kao, M.-J.; Lee, L.-S.;

2010 / IEEE

Description

This item was taken from the IEEE Periodical ' High-Performance Poly-Si TFTs Using Ultrathin $\hbox{HfSiO}_{x}$ Gate Dielectric for Monolithic Three-Dimensional Integrated Circuits and System on Glass Applications ' High-performance poly-Si thin-film transistors (TFTs) using an ultrathin high- � metal gate stack with a subthreshold swing (SS) of 193 mV/dec when operating at room temperature and maximum thermal budget of 700�C are readily compatible with monolithic 3-D integrated circuits (3D-ICs) and silicon-on-glass (SOG) applications. The SS is reduced to 31 mV/dec, and the on/off current ratio is increased to 108 at 77 K; the result is a significant reduction of leakage current and lower power consumption. Long-channel TFTs have a higher drain current noise spectral density SID and a smaller exponential frequency factor (�) due to the influence of numerous grain boundaries on carrier transport, as confirmed by gap state density extraction. These devices may pave the way for high-performance circuit designs and applications, such as monolithic 3D-ICs, SOG, and active-matrix organic LED.