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Enhancement of Program Speed in Dopant-Segregated Schottky-Barrier (DSSB) FinFET SONOS for NAND-Type Flash Memory
By: Yun Chang Park; Sungho Kim; Jin-Woo Han; Sung-Jin Choi; Yang-Kyu Choi; Jeoung Woo Kim; Moon-Gyu Jang; Myeong Ho Song; Jae Sub Oh; Gi Sung Lee; Kwang Hee Kim; Jin Soo Kim;
2009 / IEEE
Description
This item was taken from the IEEE Periodical ' Enhancement of Program Speed in Dopant-Segregated Schottky-Barrier (DSSB) FinFET SONOS for NAND-Type Flash Memory ' A dopant-segregated (DS) Schottky-barrier (DSSB) FinFET SONOS for NAND flash memory with a proposed architecture is demonstrated for the first time. A DSSB technique with a nickel-silicided source/drain (S/D) is integrated in the FinFET with a 30-50-nm range of fin width. Compared with the conventional FinFET SONOS, the DSSB FinFET SONOS boasts very fast programming time with low voltage. For a programming state, hot electrons triggered by sharp band bending at the DS S/D region are used. As a result, a threshold voltage (V th) shift of 4.5 V is achieved in a fast programming time of 100 ns.
Related Topics
Voltage 4.5 V
Decision Support Systems
Sonos Devices
Electrons
Flash Memory
Nonvolatile Memory
Low Voltage
Threshold Voltage
Mosfet Circuits
Nanoscale Devices
Sonos Memory
Dopant Segregated (ds)
Finfet
Flash Memory
Hot Electrons
Nand Flash
Nonvolatile Memory
Schottky-barrier Mosfet
Silicon–oxide–nitride–oxide–silicon (sonos)
Sonos Memory
Dopant Segregated (ds)
Finfet
Flash Memory
Hot Electrons
Nand Flash
Nonvolatile Memory
Schottky-barrier Mosfet
Silicon–oxide–nitride–oxide–silicon (sonos)
Distance 30 Nm To 50 Nm
Silicon-oxide-nitride-oxide-silicon
Nand-type Flash Memory
Finfet Sonos
Dopant-segregated Schottky-barrier
Program Speed
Time 100 Ns
Mosfet
Flash Memories
Schottky Barriers
Components, Circuits, Devices And Systems
Engineered Materials, Dielectrics And Plasmas
Engineering
Finfets