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Refinement of Unified Random Access Memory

By: Jin-Woo Han; Seong-Wan Ryu; Yang-Kyu Choi; Jeoung Woo Kim; Yun Chang Park; Gi-Sung Lee; Chung-Jin Kim; Meyong-Ho Song; Jae-Sub Oh; Kwang Hee Kim; Jin-Soo Kim; Sungho Kim; Sung-Jin Choi;

2009 / IEEE


This item was taken from the IEEE Periodical ' Refinement of Unified Random Access Memory ' This paper investigates how gate height (Hg), which refers to the size of a floating-body, affects the program efficiency and retention characteristics of one-transistor DRAM (1T-DRAM) and nonvolatile memory (NVM) for a FinFET SONOS device that has a partially depleted silicon-on-insulator (PDSOI) region as a charge storage node for a 1T-DRAM operation. A device with a lower Hg yields enhanced program efficiency due to the higher impact ionization rate caused by the enlarged PDSOI region for both 1T-DRAM and NVM operations. The device with the lower Hg shows slightly poor retention characteristics in the NVM unlike the 1T-DRAM.