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Threshold voltage instabilities in high-/spl kappa/ gate dielectric stacks

By: Gusev, E.; Kumar, A.; Zafar, S.; Cartier, E.;

2005 / IEEE

Description

This item was taken from the IEEE Periodical ' Threshold voltage instabilities in high-/spl kappa/ gate dielectric stacks ' Over recent years, there has been increasing research and development efforts to replace SiO/sub 2/ with high dielectric constant (high-/spl kappa/) materials such as HfO/sub 2/, HfSiO, and Al/sub 2/O/sub 3/. An important transistor reliability issue is the threshold voltage stability under prolonged stressing. In these materials, threshold voltage is observed to shift with stressing time and conditions, thereby giving rise to threshold voltage instabilities. In this paper, we review various causes of threshold voltage instability: charge trapping under positive bias stressing, positive charge creation under negative bias stressing (NBTI), hot-carrier stressing, de-trapping and transient charge trapping effects in high-/spl kappa/ gate dielectric stacks. Experimental and modeling studies for these threshold voltage instabilities are reviewed.