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Ion induced charge collection and SEU sensitivity of emitter coupled logic (ECL) devices

By: Pinkerton, S.D.; Kirshman, J.F.; Hansel, S.J.; Crawford, K.B.; Penzin, S.H.; Crain, W.R.; Koga, R.; Maher, M.; Moss, S.C.;

1995 / IEEE

Description

This item was taken from the IEEE Periodical ' Ion induced charge collection and SEU sensitivity of emitter coupled logic (ECL) devices ' This paper presents single event upset (SEU) and latchup test results for selected Emitter Coupled Logic (ECL) microcircuits, including several types of low capacity SRAMs and other memory devices. The high speed of ECL memory devices makes them attractive for use in space applications. However, the emitter coupled transistor design increases susceptibility to radiation induced functional errors, especially SEU, because the transistors are not saturated, unlike the transistors in a CMOS device. Charge collection at the sensitive nodes in ECL memory elements differs accordingly. These differences are responsible, in part, for the heightened SEU vulnerability of ECL memory devices relative to their CMOS counterparts.