Your Search Results

Use this resource - and many more! - in your textbook!

AcademicPub holds over eight million pieces of educational content for you to mix-and-match your way.

Experience the freedom of customizing your course pack with AcademicPub!
Not an educator but still interested in using this content? No problem! Visit our provider's page to contact the publisher and get permission directly.

Circuit width, register allocation, and ordered binary decision diagrams

By: Berman, C.L.;

1991 / IEEE

Description

This item was taken from the IEEE Periodical ' Circuit width, register allocation, and ordered binary decision diagrams ' The relationship between two important means of representing Boolean functions, combinational circuits and ordered binary decision diagrams (OBDDs), is studied. Circuit width is related to OBDD size. and it is shown how algorithms for register allocation can be used to determine a good variable order for OBDD construction. In particular, it is shown that if C has n inputs, moutputs, and width w(C), then there is a variable ordering for which the directed-acyclic-graph-based representation for C has at most n*m*2/sup w(C)/ modes. Since the width of a circuit is closely related to the number of registers required to evaluate the circuit, the result indicates that register allocation techniques can be used to compute good variable orderings. How these ideas can be used in decomposing a function either for representation as a set of OBDDs or for implementation in a cascode technology is outlined. A class of multioutput functions, which includes addition, whose members have particularly small OBDDs is characterized.<>