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Lateral charge transport from heavy-ion tracks in integrated circuit chips

By: Schwartz, H.R.; Zoutendyk, J.A.; Nevill, L.R.;

1988 / IEEE


This item was taken from the IEEE Periodical ' Lateral charge transport from heavy-ion tracks in integrated circuit chips ' A 256 K DRAM has been used to study the lateral transport of charge (electron-hole pairs) induced by direct ionization from heavy-ion tracks in an IC. The qualitative charge transport has been simulated using a 2-D numerical code in cylindrical coordinates. The experimental bit-map data clearly show the manifestation of lateral charge transport in the creation of adjacent multiple-bit errors from a single heavy-ion track. The heavy-ion data further demonstrate the occurrence of multiple-bit errors from single ion tracks with sufficient stopping power. The qualitative numerical simulation results suggest that electric-field-funnel-aided (drift) collection accounts for single error generated by an ion passing through a charge-collecting junction, while multiple errors from a single ion track are due to lateral diffusion of ion-generated charge. A quantitative analysis of this effect would require that the simulation be extended to adjacent devices and would therefore require a 3-D numerical code in Cartesian coordinates.<>