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Author: Trzcinski, R.

Results

A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology. On high resistivity substrate
2003 / IEEE / 1-58113-682-X
By: Ray, A.; Safran, J.; Talbi, M.; Trzcinski, R.; Meeyoung Yoon; Wagner, L.; Sherony, M.; Zamdmer, N.; Plouchart, J.-O.; Jonghae Kim; Yue Tan;
A 4-91 GHz distributed amplifier in a standard 0.12 /spl mu/m SOI CMOS microprocessor technology
2003 / IEEE / 0-7803-7842-3
By: Trzcinski, R.; Groves, R.; Yue Tan; Sherony, M.; Liang-Hung Lu; Talbi, M.; Jonghae Kim; Plouchart, J.-O.; Wagner, L.; Zamdmer, N.; Ray, A.;
A 4-91-GHz traveling-wave amplifier in a standard 0.12-/spl mu/m SOI CMOS microprocessor technology
2004 / IEEE
By: Ray, A.; Talbi, M.; Trzcinski, R.; Groves, R.A.; Tan, Y.; Wagner, L.F.; Liang-Hung Lu; Zamdmer, N.; Jonghae Kim; Plouchart, J.-O.; Sherony, M.;
A 243-GHz F/sub t/ and 208-GHz F/sub max/, 90-nm SOI CMOS SoC technology with low-power millimeter-wave digital and RF circuit capability
2004 / IEEE / 0-7803-8289-7
By: Plouchart, J.-O.; Trzcinski, R.; Jonghae Kim; Zamdmer, N.; Narasimha, S.; Chaloux, S.; Wagner, L.; Khare, M.;
A 243-GHz F/sub t/ and 208-GHz F/sub max/, 90-nm SOI CMOS SoC technology with low-power mm-wave digital and RF circuit capability
2005 / IEEE
By: Sweeney, S.L.; Wagner, L.F.; Khare, M.; Narasimha, S.; Chaloux, S.; Trzcinski, R.; Jonghae Kim; Zamdmer, N.; Plouchart, J.-O.;
A 44GHz differentially tuned VCO with 4GHz tuning range in 0.12 /spl mu/m SOI CMOS
2005 / IEEE / 0-7803-8904-2
By: Kun Wu; Trzcinski, R.; Zamdmer, N.; Plouchart, J.-O.; Jonghae Kim; Moon Kim; Gross, B.J.;
Scalability of SOI CMOS technology and circuit to millimeter wave performance
2005 / IEEE / 0-7803-9250-7
By: Wu, K.; Trzcinski, R.; Gross, J.; Kim, J.; Plouchart, J.-O.;
SOI 90-nm ring oscillator sub-ps model-hardware correlation and parasitic-aware optimization leading to 1.94-ps switching delay
2005 / IEEE / 0-7803-9268-X
By: Williams, R.; Hyde, P.; Karam, V.; Trzcinski, R.; Kun Wu; Myung-Hee Na; Jonghae Kim; Plouchart, J.-O.; Clark, W.; Gross, B.J.; Mc Cullen, J.;
Performance Variations of a 66GHz Static CML Divider in 90nm CMOS
2006 / IEEE / 1-4244-0079-1
By: Karam, V.; Jonghae Kim; Plouchart, J.-O.; Gross, J.; Trzcinski, R.;
CMOS Mixed-Signal Circuit Process Variation Sensitivity Characterization for Yield Improvement
2006 / IEEE / 1-4244-0076-7
By: Ahlgren, D.; Trzcinski, R.; Plouchart, J.-O.; Jonghae Kim; Choongyeun Cho; Daeik Kim;
A Data-Driven Statistical Approach to Analyzing Process Variation in 65nm SOI Technology
2007 / IEEE / 0-7695-2795-7
By: Choongyeun Cho; Trzcinski, R.; Sangyeun Cho; Daihyun Lim; Plouchart, J.-O.; Jonghae Kim; Daeik Kim;
Manufacturable Parasitic-Aware Circuit-Level FETs in 65-nm SOI CMOS Technology
2007 / IEEE
By: Norris, C.; Kumar, M.; Sungjae Lee; Trzcinski, R.; Choongyeun Cho; Jae-Sung Rieh; Jonghae Kim; Daeik Kim; Ahlgren, D.; Plouchart, J.-O.; Freeman, G.;
A 70GHz Manufacturable Complementary LC-VCO with 6.14GHz Tuning Range in 65nm SOI CMOS
2007 / IEEE / 1-4244-0852-0
By: Weipeng Li; Choongyeun Cho; Plouchart, J.-O.; Jonghae Kim; Kim, D.D.; Daihyun Lim; Norris, C.; Ahlgren, D.; Kumar, M.; Trzcinski, R.;
Performance Variability of a 90GHz Static CML Frequency Divider in 65nm SOI CMOS
2007 / IEEE / 1-4244-0852-0
By: Plouchart, J.-O.; Jonghae Kim; Lim, D.; Boning, D.; Trzcinski, R.; Daeik Kim; Choongyeun Cho;
Symmetric Vertical Parallel Plate Capacitors for On-Chip RF Circuits in 65-nm SOI Technology
2007 / IEEE
By: Plouchart, J.-O.; Jonghae Kim; Daeik Kim; Norris, C.; Kumar, M.; Trzcinski, R.; Choongyeun Cho;
Statistical Framework for Technology-Model-Product Co-Design and Convergence
2007 / IEEE / 978-1-59593-627-1
By: Choongyeun Cho; Trzcinski, R.; Plouchart, J.-O.; Jonghae Kim; Daeik Kim;
A 75GHz PLL Front-End Integration in 65nm SOI CMOS Technology
2007 / IEEE / 978-4-900784-04-8
By: Jonghae Kim; Daeik Kim; Trzcinski, R.; Weipeng Li; Daihyun Lim; Choongyeun Cho; Plouchart, J.-O.;
A 1.2V 15.6mW 81GHz 2:1 Static CML Frequency Divider with a Band-Pass Load in a 90nm SOI CMOS Technology
2007 / IEEE / 1-4244-1022-3
By: Daiek Kim; Plouchart, J.-O.; Trzcinski, R.; Choongyeun Cho; Plett, C.; Karam, V.; Jonghae Kim;
65nm SOI CMOS SoC Technology for Low-Power mmWave and RF Platform
2008 / IEEE / 978-1-4244-1855-8
By: Jonghae Kim; Kim, D.D.; Trzcinski, R.; Plouchart, J.-O.; Choongyeun Cho;
Decomposition and Analysis of Process Variability Using Constrained Principal Component Analysis
2008 / IEEE
By: Daihyun Lim; Plouchart, J.-O.; Jonghae Kim; Kim, D.D.; Choongyeun Cho; Trzcinski, R.; Sangyeun Cho;
CMOS compatible thin wafer processing using temporary mechanical wafer, adhesive and laser release of thin chips/wafers for 3D integration
2010 / IEEE / 978-1-4244-6412-8
By: Bing Dang; Knickerbocker, J.; Prabhakar, A.; Trzcinski, R.; Polastre, R.; Maria, J.; Tsang, C.; Andry, P.;

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