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Author: Mansun Chan

Results

Uniaxial Strain Effects on Electron Ballistic Transport in Gate-All-Around Silicon Nanowire MOSFETs
2011 / IEEE
By: Mansun Chan; Jin He; Haijun Lou; Lining Zhang;
Phase-Change Memory RESET Model Based on Detailed Cell Cooling Profile
2011 / IEEE
By: Kwong, K.C.; Mansun Chan; Mok, P.K.T.; Jin He;
An Analytical Charge Model for Double-Gate Tunnel FETs
2012 / IEEE
By: Jin He; Xinnan Lin; Lining Zhang; Mansun Chan;
Unified Scale Length for Four-Terminal Double-Gate MOSFETs
2012 / IEEE
By: Lining Zhang; Feng Liu; Xingye Zhou; Mansun Chan; Xing Zhang; Jin He; Cheng Wang;
A Junctionless Nanowire Transistor With a Dual-Material Gate
2012 / IEEE
By: Jin He; Shengqi Yang; Xinnan Lin; Yunxi Zhu; Lining Zhang; Haijun Lou; Mansun Chan;
One-Time-Programmable Memory in LTPS TFT Technology With Metal-Induced Lateral Crystallization
2012 / IEEE
By: Jin He; Chi On Chui; Lin Li; Mansun Chan;
Phase-Change Memory With Multifin Thin-Film-Transistor Driver Technology
2012 / IEEE
By: Lining Zhang; Lin Li; Mansun Chan; Chi On Chui; Jin He; Xinnan Lin;
An oxide/silicon core/shell nanowire FET
2011 / IEEE / 978-1-4577-1516-7
By: Chenyue Ma; Jin He; Lining Zhang; Mansun Chan; Lin Li; Wei Bian; Xingye Zhou;
Phase-change memory on thin-film-transistor technology
2011 / IEEE / 978-1-4577-1756-7
By: Mansun Chan; Jin He; Lining Zhang; Lin Li;
On the electrical stress-induced oxide-trapped charges in thin HfO2SiO2 gate dielectric stack
2007 / American Institute of Physics
By: Piyas Samanta; Chunxiang Zhu; Mansun Chan;
Electrical stress-induced charge carrier generation/trapping related degradation of HfAlO/SiO2 and HfO2/SiO2 gate dielectric stacks
2009 / American Institute of Physics
By: Piyas Samanta; Chin-Lung Cheng; Yao-Jen Lee; Mansun Chan;
A noncharge-sheet channel potential and drain current model for dynamic-depletion silicon-on-insulator metal-oxide-semiconductor field-effect transistors
2010 / American Institute of Physics
By: Jian Zhang; Lining Zhang; Jin He; Mansun Chan;
Critical parasitic capacitance in nano-scale phase-change memory (PCM) cell
2014 / IEEE
By: Xinxing Zhang; Yiqun Wei; Xinnan Lin; Xiaole Cui; Cheng Peng; Zhitang Song; Mansun Chan;
Comparison of ESD protection capability of SOI and bulk CMOS output buffers
1994 / IEEE / 0-7803-1357-7
By: Zhi-Jian Ma; Yuen, S.S.; Mansun Chan; Chenming Hu; Ko, P.K.; Hui, K.Y.;
SOI/bulk hybrid technology on SIMOX wafers for high performance circuits with good ESD immunity
1995 / IEEE
By: Ko, P.K.; King, J.C.; Mansun Chan; Chenming Hu;
A relaxation time approach to model the non-quasi-static transient effects in MOSFETs
1994 / IEEE / 0-7803-2111-1
By: Ping Keung Ko; Chenming Hu; Neff, R.; Kelvin Hui; Mansun Chan;
ESD reliability and protection schemes in SOI CMOS output buffers
1995 / IEEE
By: Yuen, S.S.; Mansun Chan; Chenming Hu; Ko, P.K.; Hui, K.Y.; Zhi-Jian Ma;
Threshold voltage model for deep-submicrometer fully depleted SOI MOSFET's
1995 / IEEE
By: Mansun Chan; Nguyen, C.T.; Ko, P.K.; Chan, P.C.H.; Banna, S.R.;
Comparative study of fully depleted and body-grounded non fully depleted SOI MOSFETs for high performance analog and mixed signal circuits
1995 / IEEE
By: Chenming Hu; Nguyen, C.T.; Zhi-Jian Ma; Bin Yu; Mansun Chan; Ko, P.K.;
A novel SOI CBiCMOS compatible device structure for analog and mixed-mode circuits
1995 / IEEE / 0-7803-2624-5
By: Mansun Chan; Ko, P.K.; Chenming Hu; Fung, S.K.H.;
An investigation on the robustness, accuracy and simulation performance of a physics-based deep-submicronmeter BSIM model for analog/digital circuit simulation
1996 / IEEE / 0-7803-3117-6
By: Mansun Chan; Kai Chen; Zhihong Liu; Min-Chie Jeng; Yuhua Cheng; Ping Keung Kox; Chenming Hu;
High performance bulk MOSFET fabricated on SOI substrate for ESD protection and circuit applications
1994 / IEEE / 0-7803-2406-4
By: King, J.C.; Mansun Chan; Chenming Hu; Ko, P.K.;
Interface characterization of fully-depleted SOI MOSFET by a subthreshold I-V method
1994 / IEEE / 0-7803-2406-4
By: Roa-Wen Chen; Mansun Chan; Assaderaghi, F.; Hsing-Jen Wann; Bin Yu; Chenming Hu; Ping Ko;
Narrow width effect of ROSIE isolated SOI MOSFET
1995 / IEEE / 0-7803-2547-8
By: Ko, P.K.; Chan, S.T.H.; Mansun Chan; Fung, S.K.H.;
Impact of scaling silicon film thickness on hot carrier effects in thin film fully depleted SOI MOSFETs
1996 / IEEE / 0-7803-3358-6
By: Chan, P.C.H.; Banna, S.R.; Ko, P.K.; Mansun Chan;
AC output conductance of SOI MOSFETs and impact on analog applications
1997 / IEEE
By: Chenming Hu; Bokor, J.; Mansun Chan; Chunlin Liang; Tu, R.; Sinitsky, D.;
A physical and scalable I-V model in BSIM3v3 for analog/digital circuit simulation
1997 / IEEE
By: Yuhua Cheng; Chenming Hu; Ping Keung Ko; Kai Chen; Min-Chie Jeng; Jianhui Huang; Zhihong Liu; Mansun Chan;
Experimental characterization of transient floating body effect in non-fully depleted SOI MOSFET
1997 / IEEE / 0-7803-3938-X
By: Mansun Chan; Fung, S.K.H.; Ko, P.K.;
A unified understanding on fully-depleted SOI NMOSFET hot-carrier degradation
1998 / IEEE
By: Mansun Chan; Chan, C.H.; Banna, S.R.; Ko, P.K.; Fung, S.K.H.;
A robust and physical BSIM3 non-quasi-static transient and AC small-signal model for circuit simulation
1998 / IEEE
By: Chenming Hu; Hui, K.Y.; Mansun Chan; Ko, P.K.;
A dynamic depletion SOI MOSFET model for SPICE
1998 / IEEE / 0-7803-4770-6
By: Mansun Chan; Pin Su; Tang, S.; Fung, S.; Sinitsky, D.; Chenming Hu; Ping Ko;
On the power dissipation in dynamic threshold silicon-on-insulator CMOS inverter
1998 / IEEE
By: Chan, C.H.; Wei Jin; Mansun Chan;
Performance of a CMOS compatible lateral bipolar photodetector on SOI substrate
1998 / IEEE
By: Ko, P.K.; Fung, S.K.H.; Mansun Chan; Weiquan Zhang;
Properties and design optimization of photo-diodes available in a current CMOS technology
1998 / IEEE / 0-7803-4932-6
By: Weiquan Zhang; Mansun Chan;
A new approach to study the channel charge partition of MOS transistors during non-quasi-static (NQS) turn-on
1998 / IEEE / 0-7803-4932-6
By: Mansun Chan; Wai-kit Lee;
A novel high-gain CMOS image sensor using floating N-well/gate tied PMOSFET
1998 / IEEE / 0-7803-4774-9
By: Ko, P.K.; Mansun Chan; Weiquan Zhang;
The investigation of recessed channel SOI devices
1998 / IEEE / 0-7803-4306-9
By: Ko, P.K.; Mansun Chan; Xuemei Xi; Ru Huang; Xing Zhang; Yangyuan Wang;
Building hybrid active pixels for CMOS imager on SOI substrate
1999 / IEEE / 0-7803-5456-7
By: Weiquan Zhang; Ko, P.K.; Hongmei Wang; Mansun Chan;
SOI formation from amorphous silicon by metal-induced-lateral-crystallization (MILC) and subsequent high temperature annealing
1999 / IEEE / 0-7803-5456-7
By: Shivani, S.; Poon, K.C.; Ming Qin; Hongmei Wang; Ko, P.K.; Mansun Chan; Jagar, S.; Yangyuan Wang;
Improved thin-film transistor (TFT) characteristics on chemical-mechanically polished polycrystalline silicon film
1999 / IEEE / 0-7803-5648-9
By: Mansun Chan; Chan, A.C.K.; Ko, P.K.;
A physical approach to enhance BSIM3 NQS model for fast transient simulation
1999 / IEEE / 0-7803-5648-9
By: Ko, P.K.; Mansun Chan; Wai-Kit Lee;
Performance of the floating gate/body tied NMOSFET photodetector on SOI substrate
2000 / IEEE
By: Mansun Chan; Weiquan Zhang; Ko, P.K.;
Submicron super TFTs for 3-D VLSI applications
2000 / IEEE
By: Jagar, S.; Mansun Chan; Hongmei Wang; Ko, P.K.; Yangyuan Wang;
Large-grain polysilicon MOSFET for 3-D integrated circuits
2000 / IEEE / 0-7803-6389-2
By: Mansun Chan; Chan, P.C.H.; Chan, V.W.C.;
Opposite side floating gate SOI FLASH memory cell
2000 / IEEE / 0-7803-6304-3
By: Mansun Chan; Xinnan Lin; Hongmei Wang;
Effects of grain boundaries on TFTs formed by high-temperature MILC
2000 / IEEE / 0-7803-6304-3
By: Ming Qin; Poon, M.C.; Jagar, S.; Mansun Chan; Hongmei Wang; Zhikuan Zhang; Yangyuan Wang;
Switched-capacitor power converters with integrated low dropout regulators
2001 / IEEE / 0-7803-6685-9
By: Mok, P.K.T.; Wing-Hung Ki; Wei Chen; Mansun Chan;
A high gain n-well/gate tied PMOSFET image sensor fabricated from a standard CMOS process
2001 / IEEE
By: Weiquan Zhang; Mansun Chan;
Three-dimensional CMOS SOI integrated circuit using high-temperature metal-induced lateral crystallization
2001 / IEEE
By: Mansun Chan; Chan, P.C.H.; Chan, V.W.C.;
High frequency performance of large-grain polysilicon-on-insulator MOSFETs
2001 / IEEE
By: Sang Lam; Singh, J.; Hongmei Wang; Mansun Chan;
Low voltage CMOS active pixel sensor design methodology with device scaling considerations
2001 / IEEE / 0-7803-6714-6
By: Weiquan; Chen Xu; Chao Shen; Mansun Chan; Huang, W.R.;
Optical response of photodiode in integrated DNA detection system
2001 / IEEE / 0-7803-6714-6
By: Ping K. Ko; Ip, N.Y.; Gang Lu; Wen Xu; Mei Xue; Mansun Chan;
Analysis of aligned polysilicon grain boundaries effects on the performance of large-grain polysilicon MOSFET
2001 / IEEE / 0-7803-7101-1
By: Jagar, S.; Hongmei Wang; Mansun Chan;
The silicon-on-sapphire technology for RF integrated circuits: potential and limitations
2001 / IEEE / 0-7803-7101-1
By: Wing Hung Ki; Sang Lam; Mansun Chan;
The approach to rail-to-rail CMOS active pixel sensor for portable applications
2001 / IEEE / 0-7803-7101-1
By: Chen Xu; Mansun Chan;
A novel sub-50 nm poly-Si gate patterning technology
2001 / IEEE / 0-7803-7101-1
By: Shengdong Zhang; Dacheng Zhang; Ting Li; Xiaoyan Liu; Ruqi Han; Mansun Chan;
Improved oxide quality on polysilicon by enhanced Metal-Induced-Lateral-Crystallization (MILC)
2001 / IEEE / 0-7803-7101-1
By: Mansun Chan; Hongmei Wang; Alain Chun-Keung Chan;
MOSFET drain/source charge partition under nonquasi-static switching
2001 / IEEE
By: Wai-Kit Lee; Ng, A.F.-L.; Mansun Chan; Ko, P.K.;
Double-gate SOI MOSFET fabrication from bulk silicon wafer
2001 / IEEE / 0-7803-6739-1
By: Shengdong Zhang; Chuguang Feng; Xinnan Lin; Mansun Chan; Wai-Hung Ho;
Characteristics of RF power amplifiers by 0.5 /spl mu/m SOS CMOS process
2001 / IEEE / 0-7803-6739-1
By: Sang Lam; Mansun Chan; Wing-Hung Ki;
A novel self-aligned double-gate TFT technology
2001 / IEEE
By: Sin, J.K.O.; Ruqi Han; Shengdong Zhang; Mansun Chan;
The potential and realization of multi-layers three-dimensional integrated circuit
2001 / IEEE / 0-7803-6520-8
By: Mansun Chan;
3D integrated circuit using large grain polysilicon film
2001 / IEEE / 0-7803-6520-8
By: Chan, V.W.C.; Chan, P.C.H.; Mansun Chan;
Distortion simulation of 90 nm nMOSFET for RF applications
2001 / IEEE / 0-7803-6520-8
By: Kanyu Cao; Xuemei Xi; Chenming Hu; Mansun Chan; Hui Wan; Xiaodong Jin;
Fabrication and properties of self-aligned double-gate poly-Si TFT
2001 / IEEE / 0-7803-6520-8
By: Xudong Guan; Ruqi Han; Mansun Chan; Shendong Zhang; Yangyuan Wang; Xiaoyan Liu;
A closed-form thermal noise model of SOI MOSFETs for low noise application
2001 / IEEE / 0-7803-7432-0
By: Zhang Guoyan; Wang Yangyuan; Zhang Xing; Mansun Chan; Huang Ru; Liao Huailin;
A self-aligned double-gate polysilicon TFT technology
2001 / IEEE / 0-7803-7432-0
By: Ruqi Han; Shengdong Zhang; Mansun Chan; Sin, J.K.O.;
A unified predictive TFT model with capability for statistical simulation
2001 / IEEE / 0-7803-7432-0
By: Singh, J.; Mansun Chan; Hongmei Wang; Shengdong Zhang;
A 1.0V/sub DD/ CMOS active pixel image sensor with complementary pixel architecture fabricated with a 0.25/spl mu/m CMOS process
2002 / IEEE / 0-7803-7335-9
By: Mansun Chan; Weiquan Zhang; Chen Xu;
A 1.0 V V/sub DD/ CMOS active pixel image sensor with complementary pixel architecture fabricated with a 0.25 /spl mu/m CMOS process
2002 / IEEE / 0-7803-7335-9
By: Mansun Chan; Weiquan Zhang; Chen Xu;
Implementation and characterization of self-aligned double-gate TFT with thin channel and thick source/drain
2002 / IEEE
By: Ruqi Han; Shengdong Zhang; Mansun Chan; Sin, J.K.O.;
Design methodology of the high performance large-grain polysilicon MOSFET
2002 / IEEE
By: Jagar, S.; Mansun Chan; Hongmei Wang;
A simple method for optimization of 6H-SiC punch-through junctions used in both unipolar and bipolar power devices
2002 / IEEE
By: Xing Zhang; Yangyuan Wang; Jin He; Chenming Hu; Ru Huang; Mansun Chan; Xuemei Xi;
High-isolation bonding pad with depletion-insulation structure for RF/microwave integrated circuits on bulk silicon CMOS
2002 / IEEE / 0-7803-7239-5
By: Sang Lam; Mansun Chan; Wing Hung Ki;
Equivalent junction method to predict 3-D effect of curved-abrupt p-n junctions
2002 / IEEE
By: Xuemei Xi; Jin He; Yangyuan Wang; Ru Huang; Mansun Chan; Xing Zhang; Yingxue Li; Chenming Hu;
A low-voltage CMOS complementary active pixel sensor (CAPS) fabricated using a 0.25 �m CMOS technology
2002 / IEEE
By: Chen Xu; Mansun Chan; Wing-Hung Ki;
Normalized mutual integral difference method to extract threshold voltage of MOSFETs
2002 / IEEE
By: Yingxue Li; Chenming Hu; Kanyu Cao; Mansun Chan; Xing Zhang; Jin He; Yangyuan Wang; Xuemei Xi; Ru Huang;
Reduction of off-current in self-aligned double-gate TFT with mask-free symmetric LDD
2002 / IEEE
By: Sin, J.K.O.; Ruqi Han; Shengdong Zhang; Mansun Chan;
Approaches and options for modeling sub-0.1 /spl mu/m CMOS devices
2002 / IEEE / 0-7803-7429-0
By: Chenming Hu; Jin He; Xuemei Xi; Mansun Chan;
The gate misalignment effects of the sub-threshold characteristics of sub-100 nm DG-MOSFETs
2002 / IEEE / 0-7803-7429-0
By: Mansun Chan; Kyoungsub Shin; Hiu Yung Wong;
High-speed mixed signal and RF circuit design with compact waffle MOSFET
2002 / IEEE / 0-7803-7429-0
By: Ko, P.K.; Sang Lam; Xibo Zhang; Mansun Chan;
Symmetry realization of BSIM model with dynamic reference method for circuit simulation
2002 / IEEE / 0-7803-7317-0
By: Jin He; Kanyu Cao; Xuemei Xi; Chenming Hu; Mansun Chan; Hui Wan;
An enhanced compact waffle MOSFET for RF integrated circuits
2002 / IEEE / 0-7803-7317-0
By: Ko, P.K.; Wing Hung Ki; Sang Lam; Mansun Chan;
A comparative study of RF noise characteristics of different submicron SOI MOSFET structures on SIMOX technology
2002 / IEEE / 0-7803-7317-0
By: Sang Lam; Mansun Chan; Ko, P.K.; Wai-Kit Lee; Hongmei Wang;
Implementation of fully self-aligned bottom-gate MOS transistor
2002 / IEEE
By: Shengdong Zhang; Mansun Chan; Ko, P.K.; Ru Huang; Zhikuan Zhang; Ruqi Han;
An opposite side floating gate FLASH memory scalable to 20 nm length
2002 / IEEE / 0-7803-7439-8
By: Mansun Chan; Xinnan Lin;
Improved SOI image sensor design based on backside illumination on Silicon-On-Sapphire (SOS) substrate
2002 / IEEE / 0-7803-7439-8
By: Chen Xu; Chao Shen; Mansun Chan; Ko, P.K.; Huang, R.;
Tendency for full depletion due to gate tunneling current
2002 / IEEE / 0-7803-7439-8
By: Pin Su; Fung, S.K.H.; Hui Wan; Chenming Hu; Mansun Chan;
A 1.0-V V/sub DD/ CMOS active-pixel sensor with complementary pixel architecture and pulsewidth modulation fabricated with a 0.25-/spl mu/m CMOS process
2002 / IEEE
By: Wing-Hung Ki; WeiQuan Zhang; Chen Xu; Mansun Chan;
A self-assembly conductive device for direct DNA identification in integrated microarray based system
2002 / IEEE / 0-7803-7462-2
By: Wang, K.L.; Zuhong Lu; Wen Xu; Jiong Li; Mei Xue; Mansun Chan; Ko, P.K.;
Evaluation of the partially-depleted silicon-on-sapphire technology for microwave amplifiers and other prospective applications
2002 / IEEE / 0-7803-7486-X
By: Mansun Chan; Ko, P.K.; Chao Shen; Wing-Hung Ki; Sang Lam;
A viable self-aligned bottom-gate MOS transistor technology for deep submicron 3-D SRAM
2003 / IEEE
By: Yangyuan Wang; Xiaoyan Liu; Mansun Chan; Ko, P.K.; Ru Huang; Ruqi Han; Chan, A.C.K.; Shengdong Zhang;
High-isolation bonding pad design for silicon RFIC up to 20 GHz
2003 / IEEE
By: Mansun Chan; Ko, P.K.; Mok, P.K.T.; Sang Lam;
A high-density conduction-based micro-DNA identification array fabricated with a CMOS compatible process
2003 / IEEE
By: Mei Xue; Jiong Li; Mansun Chan; Chuguang Feng; Zhikuan Zhang; Zuhong Lu;
Area-efficient CMOS charge pumps for LCD drivers
2003 / IEEE
By: Wing-Hung Ki; TianRui Ying; Mansun Chan;
A high density conduction based micro-DNA-identification array fabricated in a CMOS compatible process
2003 / IEEE / 0-7803-7707-9
By: Mansun Chan; Ko, P.K.; Zhikuan Zhang; Chuguang Feng; Zuhong Lu; Jiong Li; Mei Xue;
A self-aligned, electrically separable double-gate MOS transistor technology for dynamic threshold voltage application
2003 / IEEE
By: Ruqi Han; Ru Huang; Xinnan Lin; Shengdong Zhang; Mansun Chan;
A CMOS active pixel sensor on silicon-on-sapphire substrate with backside illumination
2003 / IEEE / 0-7803-7815-6
By: Mansun Chan; Ko, P.K.; Ru Huang; Chen Xu; Chao Shen;
A unified model for partial-depletion and full-depletion SOI circuit designs: using BSIMPD as a foundation
2003 / IEEE / 0-7803-7842-3
By: Pin Su; Chenming Hu; Niknejad, A.M.; Mansun Chan; Hui Wan; Wyatt, P.W.; Fung, S.K.H.;
An active pixel sensor (APS) based on high gain CMOS compatible lateral bipolar transistor (LBT) on SOS substrate with backside illumination
2003 / IEEE / 0-7803-8133-5
By: Chen Xu; Mansun Chan; Ko, P.K.; Chao Shen;

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