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Author: Knickerbocker, J.

Results

Decoupling capacitor modeling and characterization for power supply noise in 3D systems

2012 / IEEE / 978-1-4673-0351-4
By: Knickerbocker, J.; Webb, B.; Rose, K.; Scheuermann, M.; Jian-Qiang Lu; Putnam, C.; Xiaoxiong Gu; Zheng Xu;

Micro-interconnection reliability: Thermal, electrical and mechanical stress

2012 / IEEE / 978-1-4673-1965-2
By: Andry, P.; Polastre, R.; Dang, B.; Maria, J.; Tsang, C.K.; Wright, S.L.; Knickerbocker, J.;

Advanced wafer bonding and laser debonding

2014 / IEEE
By: Andry, P.; Glodde, M.; Knickerbocker, J.; Dang, B.; Tsang, C.; Polastre, R.; Budd, R.;

Transferrable fine pitch probe technology

2014 / IEEE
By: Dang, B.; Wright, S. L.; Liu, Y.; Knickerbocker, J.; Polastre, R.; Andry, P.;

Characterization of micro-bump C4 interconnects for Si-carrier SOP applications

2006 / IEEE / 1-4244-0152-6
By: Andry, P.S.; Horton, R.; Buchwalter, L.P.; Gan, H.; Polastre, R.; Wright, S.L.; Sprogis, E.; Sharma, A.; Lloyd, J.R.; Sri-Jayantha, M.S.; Knickerbocker, J.; Tsang, C.; Patel, C.;

Pb-free microjoints (50 /spl mu/m pitch) for the next generation microsystems: the fabrication, assembly and characterization

2006 / IEEE / 1-4244-0152-6
By: Kang, S.K.; Pavlova, A.; Sprogis, E.; Knickerbocker, J.; Tsang, C.; Patel, C.; Lee, K.W.; Horton, R.; Buchwalter, L.P.; Polastre, R.; Wright, S.L.; Gan, H.; Andry, P.S.;

High-efficiency 60 GHZ antenna fabricated using low-cost silicon micromachining techniques

2007 / IEEE / 978-1-4244-0877-1
By: Hoivik, N.; Gaucher, B.; Magerlein, J.H.; Knickerbocker, J.; Grzyb, J.; Jahnes, C.V.; Pfeiffer, U.; Patel, C.; Tsang, C.; Cotte, J.M.; Liu, D.;

300-Gb/s, 24-Channel Full-Duplex, 850-nm, CMOS-Based Optical Transceivers

2008 / IEEE / 978-1-55752-856-8
By: Schow, C.L.; Kash, J.; Knickerbocker, J.; Horton, R.; Tsang, C.; Patel, C.; Kuchta, D.; Ruiz, N.; Doany, F.E.;

50�m pitch Pb-free micro-bumps by C4NP technology

2008 / IEEE / 978-1-4244-2230-2
By: Da-Yuan Shih; Bing Dang; Hughlett, E.; Ruhmer, K.; Semkow, K.; Tsang, C.; Buchwalter, S.; Knickerbocker, S.; Gruber, P.; Knickerbocker, J.; Patel, C.; Garant, J.;

3D chip stack with integrated decoupling capacitors

2009 / IEEE / 978-1-4244-4475-5
By: Wright, S.L.; Bing Dang; Knickerbocker, J.; Polastre, R.; Tsang, C.; Ketkar, S.; Sprogis, E.; Andry, P.;

Reliable through silicon vias for 3D silicon applications

2009 / IEEE / 978-1-4244-4492-2
By: Liptak, R.; Tsang, C.; Shapiro, M.; Dang, B.; Andry, P.; Interrante, M.; Griffith, J.; Knickerbocker, J.; Berger, D.; Truong, V.; Guerin, L.; Sprogis, E.;

CMOS compatible thin wafer processing using temporary mechanical wafer, adhesive and laser release of thin chips/wafers for 3D integration

2010 / IEEE / 978-1-4244-6412-8
By: Bing Dang; Knickerbocker, J.; Prabhakar, A.; Trzcinski, R.; Polastre, R.; Maria, J.; Tsang, C.; Andry, P.;

Three-Dimensional Chip Stack With Integrated Decoupling Capacitors and Thru-Si Via Interconnects

2010 / IEEE
By: Andry, P.; Shapiro, M.; Bing Dang; Knickerbocker, J.; Berger, D.; Liptak, R.; Tsang, C.; Guerin, L.; Truong, V.; Griffith, J.; Interrante, M.; Wright, S.; Sprogis, E.;

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