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Author: Byung-Gook Park

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Analyses on Small-Signal Parameters and Radio-Frequency Modeling of Gate-All-Around Tunneling Field-Effect Transistors
2011 / IEEE
By: Byung-Gook Park; Kyung Rok Kim; Jae Sung Lee; Seongjae Cho; In Man Kang; Harris, J.S.;
High-Density Three-Dimensional Stacked nand Flash With Common Gate Structure and Shield Layer
2011 / IEEE
By: Min-Kyu Jeong; Jong-Ho Lee; Byung-Gook Park; Hyungcheol Shin; Sung-Min Joe;
Full-Swing a-IGZO Inverter With a Depletion Load Using Negative Bias Instability Under Light Illumination
2012 / IEEE
By: Hyungcheol Shin; Ju-Wan Lee; In-Tak Cho; Jong-Ho Lee; Byung-Gook Park; Jun-Mo Park; Hyuck-In Kwon; Il-Hwan Cho; Joon-Seop Kwak; Chi-Sun Hwang; Woo-Seok Cheong;
Characteristics of Elliptical Gate-All-Around SONOS Nanowire With Effective Circular Radius
2012 / IEEE
By: Byung-Gook Park; Myoung-Sun Lee; Jong-Ho Lee; Il Hwan Cho;
Complementary Silicon Nanowire Hydrogen Ion Sensor With High Sensitivity and Voltage Output
2012 / IEEE
By: Byung-Gook Park; Mihee Uhm; Jung Han Lee; Won Hee Lee; Dong Myong Kim; Jin-Moo Lee; Jieun Lee; Dae Hwan Kim; Yong-Joo Jeong;
An Accurate Compact Model Considering Direct-Channel Interference of Adjacent Cells in Sub-30-nm nand Flash Technologies
2012 / IEEE
By: Hyungcheol Shin; Byung-Gook Park; Seongjun Seo; Kyunghwan Lee; Ik Joon Chang; Il Han Park; Myounggon Kang;
The Compact Modeling of Channel Potential in Sub-30-nm NAND Flash Cell String
2012 / IEEE
By: Byung-Gook Park; Dong Hyuk Chae; Kyunghwan Lee; Myounggon Kang; Hyungcheol Shin;
Stacked Gated Twin-Bit (SGTB) SONOS Memory Device for High-Density Flash Memory
2012 / IEEE
By: Doo-Hyun Kim; Dong Hua Li; Jung Hoon Lee; Seongjae Cho; Won Bo Shim; Gil Sung Lee; Jungdal Choi; Byung-Gook Park; Wandong Kim; Se Hwan Park; Yoon Kim;
Investigation of vertical type single-electron transistor with sidewall spacer quantum dot
2011 / IEEE / 978-1-4577-1756-7
By: Jung Han Lee; Kyung-Wan Kim; Byung-Gook Park; Wandong Kim; Joo Yun Seo; Hyun Woo Kim; Kwon-Chil Kang;
Vertical-channel stacked array (VCSTAR) for 3D NAND flash memory
2011 / IEEE / 978-1-4577-1756-7
By: Wandong Kim; Se Hwan Park; Yoon Kim; Byung-Gook Park; Joo Yon Seo;
Hysteresis mechanism in pentacene thin-film transistors with poly(4-vinyl phenol) gate insulator
2006 / American Institute of Physics
By: Cheon An Lee; Dong-Wook Park; Keum-Dong Jung; Byung-ju Kim; Yoo Chul Kim; Jong Duk Lee; Byung-Gook Park;
Low hysteresis pentacene thin-film transistors using SiO2/cross-linked poly(vinyl alcohol) gate dielectric
2006 / American Institute of Physics
By: Dong-Wook Park; Cheon An Lee; Keum-Dong Jung; Byung-Gook Park; Hyungcheol Shin; Jong Duk Lee;
Optical capacitance-voltage characterization of charge traps in the trapping nitride layer of charge trapped flash memory devices
2007 / American Institute of Physics
By: Byung-Gook Park; Dae Hwan Kim; Dong Myong Kim; Jong Duk Lee; Jang Uk. Lee; Kang Seob Roh; Gu Cheol Kang; Seung Hwan Seo; Kwan Young Kim; Sunyeong Lee; Kwan Jae Song; Chang Min Choi; So Ra Park; Jun Hyun Park; Ki Chan Jeon;
Dynamic bias temperature instability-like behaviors under FowlerNordheim program/erase stress in nanoscale silicon-oxide-nitride-oxide-silicon memories
2008 / American Institute of Physics
By: Seung Hwan Seo; Gu-Cheol Kang; Kang Seob Roh; Kwan Young Kim; Sunyeong Lee; Kwan-Jae Song; Chang Min Choi; So Ra Park; Kichan Jeon; Jun-Hyun Park; Byung-Gook Park; Jong Duk Lee; Dong Myong Kim; Dae Hwan Kim;
A study on the carrier injection mechanism of the bottom-contact pentacene thin film transistor
2010 / American Institute of Physics
By: Keum-Dong Jung; Yoo Chul Kim; Hyungcheol Shin; Byung-Gook Park; Jong Duk Lee; Eou Sik Cho; Sang Jik Kwon;
A novel 0.1 �m MOSFET structure with inverted sidewall and recessed channel
1996 / IEEE
By: Chun, K.; Byung-Gook Park; Jeongho Lyu; Jong Duk Lee;
A 0.1 /spl mu/m inverted-sidewall recessed-channel (ISRC) nMOSFET for high performance and reliability
1995 / IEEE / 0-7803-2700-4
By: Kukjin Chun; Byung-Gook Park; Jeongho Lyu; Jong Duk Lee;
Characteristics of 0.1 /spl mu/m Si MOSFETs with ISRC (Inverted-Sidewall Recessed-Channel) structure for reduced short channel effect
1996 / IEEE / 0-7803-3374-8
By: Youngjin Choi; Jeongho Lyu; Jong Duk Lee; Kukjin Chun; Byung-Gook Park; Yeong Taek Lee;
A 0.1 /spl mu/m IHLATI (indium halo by large angle tilt implant) nMOSFET for 1.0 V low power application
1997 / IEEE / 0-7803-3911-8
By: Young Jin Choi; Jong Duk Lee; Byung-Gook Park;
Reduction of hot-carrier generation in 0.1-�m recessed channel nMOSFET with laterally graded channel doping profile
1997 / IEEE
By: Jeongho Lyu; Jong Duk Lee; Kukjin Chun; Byung-Gook Park;
Surface morphology and I-V characteristics of single-crystal, polycrystalline, and amorphous silicon FEA's
1999 / IEEE
By: Byung-Gook Park; Hyung Soo Uh; Byung Chang Shim; Jong Duk Lee;
Room temperature operation of a single electron switch with an electrically formed quantum dot
1999 / IEEE / 0-7803-5170-3
By: Byung-Gook Park; Jong Duk Lee; Dong-Hyuk Chae; Dae Hwan Kim;
Programming dynamics of a single electron memory cell with a high-density SiGe nanocrystal array at room temperature
1999 / IEEE / 0-7803-5170-3
By: Tae-Sik Yoon; Dong-Hyuk Chae; Byung-Gook Park; Jong Duk Lee; Ki-Bum Kim; Jang-Yeon Kwon; Dae Hwan Kim;
A study on soft- and hard-breakdowns in MOS capacitors using the parallel stressing method
1999 / IEEE / 0-7803-5727-2
By: Jae-Sung Sim; Byung-Gook Park; Jong-Duk Lee; Sung-In Hong; In-Ho Nam;
Co-silicide formation on silicon FEAs from Co, Co/Ti and Ti/Co layers
1999 / IEEE / 0-7803-5410-9
By: Byung-Gook Park; Byung Chang Shim; Jong Duk Lee;
Threshold voltage reduction model for buried channel PMOSFETs using quasi-2-D Poisson equation
2000 / IEEE
By: Dong-Soo Woo; Yeong-Taek Lee; Byung-Gook Park; Jong Duk Lee;
Silicide application on gated single-crystal, polycrystalline and amorphous silicon FEAs. I. Mo silicide
2001 / IEEE
By: Byung-Gook Park; Byung Chang Shim; Jong Duk Lee;
A formation of cobalt silicide on silicon field emitter arrays by electrical stress
2001 / IEEE
By: Jong Duk Lee; Byung-Gook Park; Byung Chang Shim; Sung Hun Jin;
Properties of phosphorus implanted mold type diamond FEAs
2001 / IEEE / 0-7803-7197-6
By: Byung-Gook Park; Euo Sik Cho; Jong Duk Lee; Sang Jik Kwon;
Characteristics of phosphorus implanted MPCVD diamond films
2001 / IEEE / 0-7803-7197-6
By: Sang Jik Kwon; Byung-Gook Park; Euo Sik Cho; Jong Duk Lee;
Ultrathin gate oxide grown on nitrogen-implanted silicon for deep submicron CMOS transistors
2001 / IEEE
By: Man-Sug Kang; Seung-Woo Lee; Jong Duk Lee; Byung-Gook Park; Sung In Hong; Young-Wug Kim; In-Ho Nam; Won Seong Lee; Jae Sung Sim; Kwang-Pyuk Suh;
Ultra fine multi-line patterning based on sidewall patterning technique
2001 / IEEE / 4-89114-017-8
By: Byung-Gook Park; Jong Duk Lee; Suk-Kang Sung; Kyung-Hoon Chung;
Thickness measurements of ultra-thin films using AFM
2001 / IEEE / 4-89114-017-8
By: Hyuck In Kwon; Tae Hun Kim; Byung-Gook Park; Jong Duk Lee;
Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic
2002 / IEEE
By: Sung Woo Hwang; Bum Ho Choi; Jong Duk Lee; Byung-Gook Park; Doyeol Ahn; Kyung Rok Kim; Suk-Kang Sung; Dae Hwan Kim;
A new 50-nm nMOSFET with side-gates for virtual source-drain extensions
2002 / IEEE
By: Young Jin Choi; Byung-Gook Park; Jong duk Lee; Kyung Rok Kim; Byung Yong Choi;
Negative-differential transconductance characteristics at room temperature in 30-nm square-channel SOI nMOSFETs with a degenerately doped body
2002 / IEEE
By: Suk-Kang Sung; Dae Hwan Kim; Kyung Rok Kim; Jong Duk Lee; Byung-Gook Park;
Single-electron transistors based on gate-induced Si island for single-electron logic application
2002 / IEEE
By: Byung-Gook Park; Jong Duk Lee; Kyung Rok Kim; Suk-Kang Sung; Dae Hwan Kim;
A practical SPICE model based on the physics and characteristics of realistic single-electron transistors
2002 / IEEE
By: Jeong-Taek Kong; Gi-Young Yang; Young-Jin Gu; Byung-Gook Park; Sang-Hoon Lee; Jong Duk Lee; Kyung Rok Kim; Dae Hwan Kim;
Electrical characteristics of FinFET with vertically nonuniform source/drain doping profile
2002 / IEEE
By: Dong-Soo Woo; Byung-Gook Park; Jong Duk Lee; Young-Jin Choi; Byung-Yong Choi; Woo Young Choi; Jong-Ho Lee;
Complementary self-biased scheme for the robust design of CMOS/SET hybrid multi-valued logic
2003 / IEEE / 0-7695-1918-0
By: Dae Hwan Kim; Sang Hoon Lee; Ki-Whan Song; Byung-Gook Park; Kyung Rok Kim; Jong Duk Lee; Chun-An Lee; Gwanghyeon Baek; Jaewoo Kyung;
A new linearity measurement algorithm for sub-micron microwave cmos
2003 / IEEE / 0-7803-7705-2
By: Jong Duk Lee; Dong-Soo Woo; Byung Yong Choi; Woo Young Choi; Byung-Gook Park;
30 nm MOSFET development based on processes for nanotechnology
2002 / IEEE / 0-7803-7578-5
By: Byung-Gook Park; Dong-Soo Woo; Young Jin Choi; Byung Yong Choi; Woo Young Choi; Jong Duk Lee;
A nonvolatile pentacene organic memory (PENTOM) with a triple-layer gate insulator on a flexible substrate
2003 / IEEE / 0-7803-7727-3
By: Jong Duk Lee; Byung-Gook Park; Jin Wook Kim; Cheon An Lee; Yong Kyu Lee; Sung Hun Jin;
Realistic single-electron transistor modeling and novel CMOS/SET hybrid circuits
2003 / IEEE / 0-7803-7976-4
By: Jong Duk Lee; Jae Sung Sim; Dong-Soo Woo; Kyung Rok Kim; Byung-Gook Park; Sang-Hoon Lee; Gwanghyeon Baek; Ki-Whan Song; Dae Hwan Kim;
Reverse-order source/drain formation with double offset spacer (RODOS) for CMOS low-power, high-speed and low-noise amplifiers
2003 / IEEE / 1-58113-682-X
By: Jong Duk Lee; Woo Young Choi; Byung-Gook Park;
The analysis of dark signals in the CMOS APS imagers from the characterization of test structures
2004 / IEEE
By: In Man Kang; Hyuck In Kwon; Sang Sik Park; Jong Duk Lee; Byung-Gook Park;
Reverse-order source/drain formation with double offset spacer (RODOS) for low-power and high-speed application
2003 / IEEE
By: Dong-Soo Woo; Byung-Yong Choi; Woo Young Choi; Byung-Gook Park; Jong Duk Lee;
Twin-bit silicon-oxide-nitride-oxide-silicon (SONOS) memory by inverted sidewall patterning (TSM-ISP)
2003 / IEEE
By: Jong Duk Lee; Sang Hoon Lee; Tae-Hun Kim; Yong Kyu Lee; Byung-Gook Park;
Fabrication and program/erase characteristics of 30-nm SONOS nonvolatile memory devices
2003 / IEEE
By: Soo Doo Chae; Byung-Gook Park; Yong Kyu Lee; Jong Duk Lee; Chung Woo Kim; Chang Ju Lee; Il-Han Park; Suk-Kang Sung;
Stable extraction of linearity (V/sub IP3/) for nanoscale RF CMOS devices
2004 / IEEE
By: Dong-Soo Woo; Byung Yong Choi; Woo Young Choi; Byung-Gook Park; Jong Duk Lee;
Excellent 2-bit silicon-oxide-nitride-oxide-silicon(SONOS) memory (TSM) with a 90-nm merged-triple gate
2003 / IEEE / 0-7803-8139-4
By: Jae Sung Sim; Yong Kyu Lee; Kim, K.; Donggun Park; Tae Hoon Kim; Suk Kang Sung; Sung Taeg Kang; Byung-Gook Park; Jong Duk Lee; Chilhee Chung;
Silicon MOSFET-based field induced band-to-band tunneling effect transistor - "FIBTET"
2003 / IEEE / 0-7803-8139-4
By: Ki-Whan Song; Gwang-Hyun Baek; Kyung Rok Kim; Byung-Gook Park; Jong Duk Lee; Jung-Im Huh; Hyun Ho Kim;
Twin SONOS memory with 30-nm storage nodes under a merged gate fabricated with inverted sidewall and damascene process
2004 / IEEE
By: Ki Whan Song; Jae Woong Hyun; Kinam Kim; Donggun Park; Chung, C.; Kwon, O.I.; Sung Woo Lee; Yong Kyu Lee; Jeong Nam Han; Sang Yeon Han; Jeong Dong Choe; Sung Taeg Kang; Byung-Gook Park; Jong Duk Lee;
Silicon-based field-induced band-to-band tunnelling effect transistor
2004 / IEEE
By: Hyun Ho Kim; Gwanghyeon Baek; Ki-Whan Song; Dae Hwan Kim; Jung Im Huh; Byung-Gook Park; Kyung Rok Kim; Jong Duk Lee;
The effects of deuterium annealing on the reduction of dark currents in the CMOS APS
2004 / IEEE
By: Byung-Gook Park; Hyungcheol Shin; Kwon, O.J.; Hyuck In Kwon; Jong Duk Lee; Sang Sik Park;
Stable threshold voltage extraction using Tikhonov's regularization theory
2004 / IEEE
By: Jong Duk Lee; Byoungho Lee; Hwi Kim; Woo Young Choi; Byung-Gook Park;
Programmable virtual source/drain MOSFETs
2004 / IEEE / 0-7803-8478-4
By: Byung Yong Choi; Yong Kyu Lee; Woo Young Choi; Il Han Park; Hyungcheol Shin; Byung-Gook Park; Sung Taeg Kang; Chilhee Chung; Donggun Park; Jong Duk Lee;
Full-swing pentacene organic thin-film transistor inverter with enhancement-mode driver and depletion-mode load
2004 / IEEE / 0-7803-8284-6
By: Jong Duk Lee; Keum Dong Jung; Sung Hun Jin; Cheon An Lee; Byung-Gook Park;
A new fabrication method for self-aligned nanoscale I-MOS (impact-ionization MOS)
2004 / IEEE / 0-7803-8284-6
By: Byung-Gook Park; Jong Duk Lee; Dong-Soo Woo; Byung Yong Choi; Woo Young Choi;
Nano-scale MOSFETs with programmable virtual source/drain
2004 / IEEE / 0-7803-8284-6
By: Byung-Gook Park; Jong Duk Lee; Dong-Soo Woo; Han Park; Woo Young Choi; Chang-Woo Oh; Byung Yong Choi; Donggun Park; Yong-Kyu Lee; Chilhee Chung;
SOI MOSFET-based quantum tunneling device - FIBTET
2004 / IEEE / 0-7803-8284-6
By: Jung Im Huh; Ki-Whan Song; Hyun Ho Kim; Kyung Rok Kim; Byung-Gook Park; Jong Duk Lee;
100-nm n-/p-channel I-MOS using a novel self-aligned structure
2005 / IEEE
By: Byung-Gook Park; Young June Park; Jong Duk Lee; Jae Young Song; Woo Young Choi;
80nm self-aligned complementary I-MOS using double sidewall spacer and elevated drain structure and its applicability to amplifiers with high linearity
2004 / IEEE / 0-7803-8684-1
By: Byung-Gook Park; Young June Park; Jong Duk Lee; Byung Yong Choi; Jae Young Song; Woo Young Choi;
Field-induced interband tunneling effect transistor (FITET) with negative-differential transconductance and negative-differential conductance
2005 / IEEE
By: Hyun Ho Kim; Kyung Rok Kim; Byung-Gook Park; Jong Duk Lee; Jung Im Huh; Ki-Whan Song;
A novel biasing scheme for I-MOS (impact-ionization MOS) devices
2005 / IEEE
By: Woo Young Choi; Byung-Gook Park; Park, Y.J.; Jong Duk Lee; Jae Young Song;
Nanoscale silicon-oxide-nitride-oxide-silicon (SONOS) structure and its applications
2004 / IEEE / 0-7803-8511-X
By: Dong Gun Park; Byung Yong Choi; Yong Kyu Lee; Byung-Gook Park;
SET/CMOS hybrid process and multiband filtering circuits
2005 / IEEE
By: You Seung Jin; Yong Kyu Lee; Ki-Whan Song; Young-Wug Kim; Jae Sung Sim; Byung-Gook Park; Jong Duk Lee; Hoon Jeoung;
Highly scalable and reliable 2-bit/cell SONOS memory transistor beyond 50nm NVM technology using outer sidewall spacer scheme with damascene gate process
2005 / IEEE / 4-900784-00-1
By: Hye Jin Cho; Eun Suk Cho; Tae Yong Kim; Byung-Gook Park; Suk Kang Sung; Yong Kyu Lee; Chang Woo Oh; Byung Yong Choi; Donggun Park; Choong-Ho Lee; Dong Won Kim; Sung Hwan Kim;
BAVI-cell: a novel high-speed 50 nm SONOS memory with band-to-band tunneling initiated avalanche injection mechanism
2005 / IEEE / 4-900784-00-1
By: Han Park; Il Han Park; Jae Sung Sim; Byung-Gook Park; Jong Duk Lee; Seongjae Cho; Hyungcheol Shin; Jihye Kong; Ki Whan Song; Tae Hun Kim;
Design of 50nm MOSFETs with Biased Side-Gates
2001 / IEEE / 2-914601-01-8
By: Byung Yong Choi; Woo Choi; Young Jin Choi; Jong Duk Lee; Byung-Gook Park;
Performance improvement of scaled-down top-contact OTFTs by two-step-deposition of pentacene
2005 / IEEE
By: Hyungcheol Shin; Keum Dong Jung; Cheon An Lee; Sung Hun Jin; Jong Duk Lee; Byung-Gook Park;
25nm Programmable Virtual Source/Drain MOSFETs Using a Twin SONOS Memory Structure
2005 / IEEE / 1-4244-0083-X
By: Woo Young Choi; Byung-Gook Park; Young June Park; Jong Duk Lee; Donggun Park; Choong-Ho Lee; Dong-Won Kim; Ju Hee Park; Byung Yong Choi;
Isolation Method for Bulk FinFET without Using CMP Process
2005 / IEEE / 1-4244-0083-X
By: Il Hwan Cho; Junsoo Kim; Il Han Park; Hyungcheol Shin; Byung-Gook Park; Jong Duk Lee; Jong-Ho Lee;
70-nm impact-ionization metal-oxide-semiconductor (I-MOS) devices integrated with tunneling field-effect transistors (TFETs)
2005 / IEEE / 0-7803-9268-X
By: Woo Young Choi; Byung-Gook Park; Young June Park; Jong Duk Lee; Jae Young Song;
Investigation of lateral charge distribution of 2-bit SONOS memory devices using physically separated twin SONOS structure
2006 / IEEE / 1-4244-0167-4
By: Hyungcheol Shin; Eun Suk Cho; Yong Kyu Lee; Choong-Ho Lee; Byung Yong Choi; Donggun Park; Jong Jin Lee; Jong Duk Lee; Tae-Yong Kim; Byung-Kyu Cho; Se Hoon Lee; Suk-Kang Sung; Dong-Won Kim; Byung-Gook Park;
Scaling-down effects on the electrical performance of top-contact pentacene TFTs
2004 / IEEE / 0-7803-8658-2
By: Keum Dong Jung; Sung Hun Jin; Jong Duk Lee; Byung-Gook Park;
Effect of source extension junction depth and substrate doping concentration on I-MOS device characteristics
2006 / IEEE
By: Woo Young Choi; Byung-Gook Park; Jong Duk Lee; Jae Young Song;
TWIn SONOS TransistOR (TWISTOR) for 2-bit/cell SONOS Memory Technology
2006 / IEEE / 1-4244-0027-9
By: Hyungcheol Shin; Dong-Won Kim; Jong Duk Lee; Byung-Gook Park; Byung Yong Choi; Donggun Park; Choong-Ho Lee; Yong Kyu Lee; Dong-Dae Kim; Keun Hee Bai; Jong Jin Lee; Heesoon Chae; Se-Hoon Lee; Suk-Kang Sung;
Design and optimization of two-bit double-gate nonvolatile memory cell for highly reliable operation
2006 / IEEE
By: Il Han Park; Seongjae Cho; Byung-Gook Park; Hyungcheol Shin; Tae Hun Kim; Jong Duk Lee; Ki-Whan Song; Jae Sung Sim;
Design optimization of gate-all-around (GAA) MOSFETs
2006 / IEEE
By: Byung-Gook Park; Jong Duk Lee; Ju Hee Park; Woo Young Choi; Jae Young Song;
Analytical modeling of field-induced interband tunneling-effect transistors and its application
2006 / IEEE
By: Jung Im Huh; Jin Ho Kim; Sangwoo Kang; Kyung Rok Kim; Kwon Chil Kang; Byung-Gook Park; Seung-Hwan Song; Jong Duk Lee; Ki-Whan Song;
Depletion-enhanced body-isolation (DEBI) array on SOI for highly scalable and reliable NAND flash memories
2006 / IEEE
By: Jung Hoon Lee; Seongjae Cho; Tae Hun Kim; Il Han Park; Byung-Gook Park; Jong Duk Lee;
Enhancement of Memory Performance Using Doubly Stacked Si-Nanocrystal Floating Gates Prepared by Ion Beam Sputtering in UHV
2007 / IEEE
By: Byung-Gook Park; Il Han Park; Kyung Joong Kim; Suk-Ho Choi; Sung Kim; Yong Min Park; Kyu Il Han;
Numerical Simulation of Field-Induced Inter-Band Tunneling Effect Transistor Using TCAD-Based Device Simulator
2006 / IEEE / 0-7803-9748-7
By: Dutton, R.W.; Byung-Gook Park; Kyung Rok Kim;
Extraction of Accumulation Mobility from C-V Characteristics of Pentacene MIS Structures
2006 / IEEE / 0-7803-9748-7
By: Dong-Wook Park; Cheon An Lee; Keum-Dong Jung; Jong Duk Lee; Hyungcheol Shin; Byung-Gook Park;
Random Telegraph Noise in 130 nm n-MOS and p-MOS Transistors
2006 / IEEE / 0-7803-9748-7
By: In Man Kang; Hochul Lee; Youngchang Yoon; Hyungcheol Shin; Jong Duk Lee; Byung-Gook Park;
Novel Device Structures for Charge Trap Flash Memories
2006 / IEEE / 1-4244-0161-5
By: Jung-Hoon Lee; Il Han Park; Byung-Gook Park; Byung Yong Choi;
Admittance Measurements on OFET Channel and Its Modeling With $R$–$C$ Network
2007 / IEEE
By: Keum-Dong Jung; Cheon An Lee; Dong-Wook Park; Byung-Gook Park; Hyungcheol Shin; Jong Duk Lee;
Extraction of Effective Carrier Velocity in RF MOSFETs
2007 / IEEE / 0-7803-9764-9
By: Byung-Gook Park; In Man Kang; Yeonam Yun; Hyungcheol Shin; Jong Duk Lee;
A New Capacitorless 1T DRAM Cell: Surrounding Gate MOSFET With Vertical Channel (SGVC Cell)
2007 / IEEE
By: Byung-Gook Park; Jong Duk Lee; Hyungcheol Shin; Kangyoon Lee; Kyoungyong Cho; Jun Seo; Hoon Jeong; Seong-Goo Kim; Yeun Seung Lee; Tae-Hun Kim; Il Han Park; Ki-Whan Song;
Improving the Endurance Characteristics Through Boron Implant at Active Edge in 1 G NAND Flash
2007 / IEEE / 1-4244-0918-7
By: Seunggun Seo; Sungnam Chang; Daewoong Kang; Hyungcheol Shin; Sangwoo Kang; Il Han Park; Yongwook Song; Jong Duk Lee; Byung-Gook Park; Wonseong Lee; Dongwon Chang; Eunjung Lee; Hojin Yoon;
A New Noise Parameter Model of Short-Channel MOSFETs
2007 / IEEE / 1-4244-0530-0
By: Ickhyun Song; Jongwook Jeon; Hyungcheol Shin; Jong Duk Lee; Byung-Gook Park; Yeonam Yun; In Man Kang;
Performance Improvement of OTFTs using Double Layer Insulator
2006 / IEEE / 0-7803-9730-4
By: Cheon An Lee; Dong-Wook Park; Jong Duk Lee; Hyungcheol Shin; Byung-Gook Park; Byeong-Ju Kim; Keum-Dong Jung;
Considerations on the C-V Characteristics of Pentacene Metal-Insulator-Semiconductor Capacitors
2006 / IEEE / 0-7803-9730-4
By: Cheon An Lee; Byeong-Ju Kim; Byung-ju Kim; Keum-Dong Jung; Dong-Wook Park; Jong Duk Lee; Hyungcheol Shin; Byung-Gook Park;
Analysis of the Output Noise Voltage in CMOS Image Sensor Readout Circuit
2006 / IEEE / 0-7803-9730-4
By: Byung-Gook Park; Hochul Lee; Youngchang Yoon; Hyungcheol Shin; Jong Duk Lee;
Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec
2007 / IEEE
By: Woo Young Choi; Tsu-Jae King Liu; Jong Duk Lee; Byung-Gook Park;
Design and Fabrication of Asymmetric MOSFETs Using a Novel Self-Aligned Structure
2007 / IEEE
By: Woo Young Choi; Jong Pil Kim; Byung-Gook Park; Jong Duk Lee; Sang Wan Kim; Jae Young Song;
A new resistive probe with higher resolution
2006 / IEEE / 978-1-4244-0540-4
By: Seungbum Hong; Juhwan Jung; Junsoo Kim; Jaehong Lee; Hyungcheol Shin; Jong Duk Lee; Byung-Gook Park;
Analysis and modeling of resistive probes
2006 / IEEE / 978-1-4244-0540-4
By: Chulmin Park; Hongsik Sang Park; Hyoungsoo Ko; Jae Young Song; Junsoo Kim; Jong Pil Kim; Seungbum Hong; Woo Young Choi; Sang Wan Kim; Byung-Gook Park; Hyungcheol Shin; Jong Duk Lee; Sung-Hoon Choa;
Breakdown voltage reduction in I-MOS devices
2006 / IEEE / 978-1-4244-0540-4
By: Jae Young Song; Woo Young Choi; Byung-Gook Park; Jong Duk Lee; Sang Wan Kim; Jong Pil Kim;

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