Your Search Results

Use materials about this topic in your textbook!

AcademicPub holds over eight million pieces of educational content - such as case studies and journal articles - for you to mix-and-match your way.

Experience the freedom of customizing your course pack with AcademicPub!
Not an educator but still interested in using this content? No problem! Visit our provider's page to contact the publisher and get permission directly.

Topic: Risc

Results

Implementation of GPS for location tracking
2011 / IEEE / 978-1-4577-0339-3
By: Othman, K.A.; Aziz, N.H.A.; Ariffin, A.A.B.;
FPGA implementation of 8-bit RISC microcontroller for embedded systems
2011 / IEEE / 978-83-932075-2-7
By: Gal, R.; Kos, A.; Frankiewicz, M.; Golda, A.;
Semicustom power gating design
2011 / IEEE / 978-1-61284-653-8
By: Mallikarjun, K.H.; Jagannadha Naidu, K.; Rudraiah, A.;
Semi-automation of Configuration Files Generation for Heterogeneous Multi-tile Systems
2011 / IEEE / 978-0-7695-4439-7
By: Rousseau, F.; Poste, N.; Chagoya-Garzon, A.;
Hardware assisted thread assignment for RISC based MPSoCs in invasive computing
2011 / IEEE / 978-1-61284-865-5
By: Henkel, J.; Vogel, B.; Herkersdorf, A.; Wild, T.; Pujari, R.K.;
A small footprint interleaved multithreaded processor for embedded systems
2011 / IEEE / 978-1-4577-1846-5
By: Ventroux, N.; Berhault, A.; Bechara, C.; Etiemble, D.; David, R.; Lhuillier, Y.; Chevobbe, S.;
A 5-stage pipelined embedded processor with optimized handling exception
2011 / IEEE / 978-1-4577-1587-7
By: Song Zhang; Wenjiang Li; Yaohui Zhang; Xiong Jiang;
The best SoC solution with AndesCore and Andes's platform
2012 / IEEE / 978-1-4577-2081-9
By: Jiang, S.; Lin, F.;
Analyzing Effect of Network Processor's Cache Dependent Parameter on MPI Broadcast Performance
2012 / IEEE / 978-1-4673-1395-7
By: Kulkarni, K.; Gadre, G.;
Customized instruction set simulation for soft-core RISC processor
2012 / IEEE / 978-1-4673-2036-8
By: Salim, Ahmad Jamal; Soo, Yewguan; Samsudin, Nur Raihana; Salim, Sani Irwan Md;
NanoMesh: An Asynchronous Kilo-Core System-on-Chip
2013 / IEEE
By: Lines, Andrew; Tse, Jonathan;
A novel technique for run-time loading for MIPS soft-core processor
2013 / IEEE
By: Seddiq, Yasser; Awedh, Mohammad; Al-Zahrani, Mosab; Al-Sharif, Tariq; Al-Obaisi, Hesham; Bahaidarah, Mazen;
Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology
2015 / IEEE
By: Patel, D.A.; Abouzeid, F.; Clerc, S.; Girard, P.; Bosio, A.; Virazel, A.; Daveau, J-M.; Roche, P.; Wilson, R.; Meyer, D.; Giner, F.; Ciampolini, L.; Bottoni, C.; Naudet, S.;
RTL implementation for a specific ALU of the 32-bit VLIW DSP processor core
2014 / IEEE
By: Dinh-Duc, Anh-Vu; Le-Huu, Khoi-Nguyen; Bui, Trong-Tu; Dang-Do, Quoc-Minh;
Advanced real Traffic Light Controller system design using Cortex-M0 ip on FPGA
2014 / IEEE
By: Daniel, Philemon; Prashant Kumar Singh;
Synthesis and Simulation of a 32Bit MIPS RISC Processor using VHDL
2014 / IEEE
By: Thakare, M. N.; Ritpurkar, S. P.; Korde, G. D.;
20-Bit RISC and DSP System Design in an FPGA
2014 / IEEE
By: Jain, Rita; Tomar, Amit Kumar Singh;
Two-pass assembler design for a reconfigurable RISC processor
2013 / IEEE
By: Sulaiman, Hamzah Asyrani; Md Salim, Sani Irwan; Salim, Ahmad Jamal; Zainudin, Muhammad Noorazlan Shah; Salahuddin, Lizawati; Jamaluddin, Rahimah;
Dynamic Branch Prediction Modeller for RISC Architecture
2013 / IEEE
By: Kotecha, Sagar; Arora, Harsh; Samyal, Romil;
Design of RISC microcontroller with Dynamic Thermal Management Unit for Temperature-Controlled Oscillator
2014 / IEEE
By: Frankiewicz, Maciej; Kos, Andrzej; Gal, Ryszard; Kocanda, Piotr;
Development of ARM based embedded system for robot applications using Linux network
2013 / IEEE
By: Ramachandra, C. G.; Vaishak, N. L.;
A proposed RISC instruction set architecture for the MAC unit of 32-bit VLIW DSP processor core
2014 / IEEE
By: Vu, Thanh; Dinh-Duc, Anh-Vu; Le-Huu, Khoi-Nguyen; Bui, Trong-Tu; Luu, Vy; Dang-Do, Quoc-Minh;
Multiply-accumulator using modified booth encoders designed for application in 16-bit RISC processor
2013 / IEEE
By: Wen-tao, Yang; Yan-chao, Zhu; Li-li, Li; Jing-yu, He; Jian-hong, Yang;
Lisp on a reduced-instruction-set processor: characterization and optimization
1988 / IEEE
By: Hennessy, J.; Steenkiste, P.;
The design of a fully integrated graphics system
1988 / IEEE
By: Frank, D.J.; Lamarche, J.; Lamoureux, J.P.; Sadler, S.P.; Torrance, R.R.; Leveille, F.;
Architectural study for an integrated fixed and floating-point VLSI-ASIC processor
1988 / IEEE / 0-8186-0834-X
By: Grohosky, G.; Oklobdzija, V.G.;
A 20 K CMOS array with 200-ps gate delay
1988 / IEEE
By: Nuez, J.-P.; Mollier, P.; Boudon, G.; Ogura, S.; Bhattacharyya, A.; Wallart, F.;
A 150-MOPS GaAs 8-bit slice processor
1988 / IEEE
By: Gauthier, R.V.; Florez, J.M.; Peterson, B.E.; Weissman, J.;
Organization, management and VLSI implementation of a multiple register window file for LISP-oriented architectures
1988 / IEEE / 0-8186-0841-2
By: Lai, Y.N.; Chia, W.H.; Aboalsamh, H.A.; Furht, B.;
A VLSI robotics vector processor for real-time control
1988 / IEEE / 0-8186-0852-8
By: Orlin, D.E.; Olson, K.W.; Sadayappan, P.; Ling, Y.L.C.;
Specifications for the development of a software environment for evaluation and translation of assembly languages
1988 / IEEE / 0-8186-0874-9
By: Bourbakis, N.G.;
Technology '89: the main event
1989 / IEEE
By: Zorpette, G.;
Processor design using path programmable logic
1988 / IEEE / 0-8186-0872-2
By: Flanagan, J.K.; Nelson, B.E.;
The MIPS M2000 system
1988 / IEEE / 0-8186-0872-2
By: March, R.; Libby, J.; Kinsel, J.; Hsu, S.; Mills, M.; Riordan, T.; Scofield, R.; Grewal, G.P.; Ries, P.;
A highly parallel processor with an instruction set including relational algebra
1988 / IEEE / 0-8186-0872-2
By: Faudemay, P.; Bechennec, J.-L.; Etiemble, D.;
Introducing the Intel i860 64-bit microprocessor
1989 / IEEE
By: Margulis, N.; Kohn, L.;
A 5.6 MIPS call-handling processor for switching systems
1989 / IEEE
By: Fukuda, T.; Morita, T.; Ohno, T.; Saita, Y.; Hayashi, T.; Ikeda, R.; Yoshida, S.;
New methods for immediate revocation
1989 / IEEE / 0-8186-1939-2
By: Karker, P.A.;
A transputer based coprocessor for VEDAS
1989 / IEEE
By: Kluge, C.; Ziem, P.; Kiehne, T.;
Hot chips and soggy software
1990 / IEEE
By: Johnson, S.C.;
A top-down parsing co-processor for compilation
1989 / IEEE / 0-8186-1911-2
By: Itano, K.; Chu, Y.;
A 50 MIPS (peak) 32/64 b microprocessor
1989 / IEEE
By: Tumblin, H.; Stamm, R.; Morris, S.; Montanaro, J.; Ladd, M.; Kowaleski, J.; Witek, R.; Heye, R.; Gieseke, B.; Dobberpuhl, D.; Devlin, R.; Conrad, R.; Hoeppner, G.;
Processing element design for a parallel computer
1990 / IEEE
By: Kadota, H.; Okabayashi, I.; Nishikawa, J.; Kakakura, Y.; Nakajima, M.; Kaneko, K.;
FRISC-E: a 250-MIPS hybrid microprocessor
1990 / IEEE
By: Creedon, T.G.; McDonald, J.F.; Grueb, H.J.;
Second-generation RISC floating point with multiply-add fused
1990 / IEEE
By: Montoye, R.K.; Hokenek, E.; Cook, P.W.;
The bus interface and paging units of the i860 microprocessor
1989 / IEEE / 0-8186-1971-6
By: Rhodehamel, M.W.;
The MasPar MP-1 architecture
1990 / IEEE / 0-8186-2028-5
By: Blank, T.;
Designing a VAX for high performance
1990 / IEEE / 0-8186-2028-5
By: Fossum, T.; Fite, D.B., Jr.;
A VLSI-intensive fault-tolerant computer architecture
1990 / IEEE / 0-8186-2028-5
By: Kini, V.; Ebersole, R.; Carson, D.; Johnson, D.; Lai, K.; Stacey, S.; Pollack, F.; Silvernail, B.;
High performance issue oriented architecture
1990 / IEEE / 0-8186-2028-5
By: Cardoza, W.; Witek, R.; Orbits, D.; Bhandarkar, D.; Cutler, D.;
A RISC development case study
1990 / IEEE / 0-8186-2028-5
By: Farrell, J.J., III; Cates, R.L.;
Twin register architecture for an AI processor
1989 / IEEE / 0-8186-1984-8
By: Aikawa, T.; Okamura, M.; Matoba, T.; Takamiya, T.; Maeda, K.; Saito, M.; Minagawa, K.;
A pipelined architecture for logic programming with a complex but single-cycle instruction set
1989 / IEEE / 0-8186-1984-8
By: Mills, J.W.;
Technology 1991: minis and mainframes
1991 / IEEE
By: Zorpette, G.;
A high-performance dual domain estimator for time-varying signal analysis
1989 / IEEE / 0-8186-1933-3
By: Adams, D.O.; Wilbur, J.;
A software based approach to achieving optimal performance for signature control flow checking
1990 / IEEE / 0-8186-2051-X
By: Warter, N.J.; Hwu, W.-m.W.;
Performance and the i860 microprocessor
1991 / IEEE
By: Atkins, M.;
Technology 1992 - Software
1992 / IEEE
By: Comerford, R.;
Technology 1992-solid state
1992 / IEEE
By: Watson, G.F.;
Technology 1992-test and measurement
1992 / IEEE
By: Riezenman, M.J.;
A 40 MIPS (peak) 64-bit microprocessor with one-clock physical cache load/store
1990 / IEEE
By: Cox, S.; Duschatko, D.; Tsuji, K.; Takagi, Y.; Watari, S.; Kuninobu, S.; Edamatsu, H.; Yamaguchi, S.; Tainguchi, T.; Katsura, J.; Nishimichi, Y.; Maeda, T.; Miyake, J.; MacGregor, D.;
A mainframe processor in CMOS technology with 0.5 mu m channel length
1990 / IEEE
By: Getzlaff, K.; Hajdu, J.; Schettler, H.; Starke, C.-W.; Loehlein, W.-D.;
Ada on reduced instruction set computers, for real-time embedded systems
1990 / IEEE
By: Renner, R.;
System architecture for Byzantine resilient computation in launch vehicle applications
1990 / IEEE
By: Iacoponi, M.J.; Grisell, R.;
Real-time, Ada-based, avionics processing
1990 / IEEE
By: Ott, G.; Bate, D.; Morton, B.;
Criteria for analyzing high frequency testing performance of VLSI automatic test equipment
1990 / IEEE / 0-8186-9064-X
By: Burlison, P.;
3.3-V BiCMOS circuit techniques for 250-MHz RISC arithmetic modules
1992 / IEEE
By: Nishida, T.; Shukuri, S.; Hiraki, M.; Yano, K.; Seki, K.; Hanawa, M.; Ohki, N.; Kawamata, A.; Morita, S.; Suzuki, M.;
RISC-(reduced instruction set computers)
1991 / IEEE
By: Chow, P.;
Future directions in CLIPPER processors
1991 / IEEE / 0-8186-2134-6
By: McGhan, H.; Sachs, H.;
Code restructuring for enhanced performance on a pipelined processor
1991 / IEEE / 0-8186-2134-6
By: Baxter, W.; Arnold, R.;
A digital optical implementation of RISC
1991 / IEEE / 0-8186-2134-6
By: Rudokas, R.S.; Guilfoyle, P.S.;
Developing a simulator for the USC Orthogonal Multiprocessor
1990 / IEEE / 0-911801-72-3
By: Mehrotra, S.;
A multichip superconducting microcomputer ETL-JC1
1991 / IEEE
By: Okada, Y.; Kosaka, S.; Aoyagi, M.; Kurosawa, I.; Nakagawa, H.; Takada, S.; Hamazaki, Y.;
Reducing the cost of branches by using registers
1990 / IEEE / 0-8186-2047-1
By: Davidson, J.W.; Whalley, D.B.;
Generation and analysis of very long address traces
1990 / IEEE / 0-8186-2047-1
By: Borg, A.; Wall, D.W.; Kessler, R.E.;
An overview of RISC vs. CISC
1990 / IEEE / 0-8186-2038-2
By: George, A.D.;
A software approach to multiprocessor address trace generation
1990 / IEEE / 0-8186-2054-4
By: Erickson, C.; Azimi, M.;
How DEC developed Alpha
1992 / IEEE
By: Comerford, R.;
3-D TLM time domain electromagnetic wave simulator for microwave circuit modeling
1991 / IEEE / 0-87942-591-1
By: Hoefer, W.J.R.; So, P.P.M.;
A streamlined DSP microprocessor architecture
1991 / IEEE / 0-7803-0003-3
By: Takefman, M.; Chow, P.;
A multiple floating point coprocessor architecture
1990 / IEEE / 0-8186-2124-9
By: Farmwald, P.M.; Rauchwerger, L.;
A high-level microprogrammed processor
1990 / IEEE / 0-8186-2124-9
By: Sanchez, E.; Iseli, C.;
A multiprocessor machine for large-scale neural network simulation
1991 / IEEE / 0-7803-0164-1
By: Elias, J.G.; Monemi, C.M.; Fisher, M.D.;
Processing overhead of the RISC state-swapping operation in the ISDN software processing
1991 / IEEE / 0-87942-638-1
By: Elkateeb, A.; Le-Ngoc, T.;
Computer architecture curriculum in the age of VLSI
1991 / IEEE / 0-87942-655-1
By: de Brito Ferrari, A.;
A high performance general purpose processing element for avionic applications
1991 / IEEE / 0-7803-0085-8
By: Hansen, J.C.; Russell, M.S.; Merboth, L.J.;
High speed data bus macro instruction set architecture
1991 / IEEE / 0-7803-0085-8
By: Prohofsky, T.;
Wideband wafer-scale interconnections in a wafer scale hybrid package for a 1000 MIPS highly pipelined GaAs/AlGaAs HBT RISC
1992 / IEEE / 0-8186-2482-5
By: McDonald, J.F.; Greub, H.; Nah, K.; Dabral, S.; Van Etten, J.S.; Philhower, R.;
Designing systems for highly parallel and distributed computing
1991 / IEEE
By: Vidovic, N.; Budin, L.; Vrsalovic, D.F.;
Stochastic modeling and analysis of propagation delays in processing units
1991 / IEEE
By: Perunicic, B.; Milutinovic, V.; Meyer, D.; Lakhani, S.;
A programmable solution for standard video compression
1992 / IEEE / 0-8186-2655-0
By: Fandrianto, J.; Williams, T.;
Alpha architecture and first implementation
1992 / IEEE / 0-8186-2655-0
By: Witek, R.T.; Sites, R.L.;
High performance single chip VAX microprocessor
1992 / IEEE / 0-8186-2655-0
By: Uhler, M.;
The LR33020 GraphX processor: a single chip X-terminal controller
1992 / IEEE / 0-8186-2655-0
By: Tobias, R.;
A compiler-directed cache strategy for GaAs microprocessor architectures
1988 / IEEE
By: Shomar, W.; Krishnamurthy, M.; Furht, B.; Llorens, L.;
A 200 MHz 64 b dual-issue CMOS microprocessor
1992 / IEEE / 0-7803-0573-6
By: Leary, M.; Madden, L.; Kuchler, K.; Kowaleski, J.; Hoeppner, G.; Gieseke, B.; Ladd, M.; Dever, D.; Conrad, R.; Chao, L.; Britton, S.; Anglin, R.; Allmon, R.; Witek, R.; Dobberpuhl, D.; Santhanam, S.; Samudrala, S.; Rajagopalan, V.; Priore, D.; Montanaro, J.; Meyer, D.; McLellan, E.;
A three-million-transistor microprocessor
1992 / IEEE / 0-7803-0573-6
By: Abu-Nofal, F.; Avra, R.; Bhabuthmal, K.; Bhamidipaty, R.; Blanck, G.; Charnas, A.; DelVecchio, P.; Grass, J.; Grinberg, J.; Hayes, N.; Haber, G.; Hunt, J.; Kizhepat, G.; Malamy, A.; Marston, A.; Mehta, K.; Nanda, S.; Van Nguyen, H.; Patel, R.; Ray, A.; Reaves, J.; Rogers, A.; Rusu, S.; Shay, T.; Sidharta, I.; Tham, T.; Tong, P.; Trauben, R.; Wong, A.; Yee, D.; Maan, N.; Steiss, D.; Youngs, L.;
Multichip modules vs. high-density printed wiring boards: a trade-off study
1992 / IEEE / 0-7803-0167-6
By: Hahne, B.M.; O'Brien, D.E.; Krusius, J.P.;
Comparison and evaluation of two catalytic migration approaches for the design of windowing-oriented register file structures
1990 / IEEE
By: Milutinovic, V.; Meyer, D.G.; Jung, G.;
Advanced graphics zoom in on operations
1993 / IEEE
By: Adapa, R.; Schroeder, C.M.; Pottinger, H.J.; Anderson, M.D.;

Next Page
Return To Top