Your Search Results

Use materials about this topic in your textbook!

AcademicPub holds over eight million pieces of educational content - such as case studies and journal articles - for you to mix-and-match your way.

Experience the freedom of customizing your course pack with AcademicPub!
Not an educator but still interested in using this content? No problem! Visit our provider's page to contact the publisher and get permission directly.

Topic: Process Conditions

Results

Interface States Beyond Band Gap and Their Impact on Charge Carrier Mobility in MOSFETs
2012 / IEEE
By: Wei Dong Zhang; Jian Fu Zhang; Zhigang Ji; Groeseneken, G.; De Gendt, S.; Kaczer, B.;
Zinc-Oxide Thin-Film Transistor With Self-Aligned Source/Drain Regions Doped With Implanted Boron for Enhanced Thermal Stability
2012 / IEEE
By: Lei Lu; Zhi Ye; Man Wong;
Influence of back-gate bias and process conditions on the gamma-degradation of the transconductance of MuGFETs
2009 / IEEE / 978-1-4577-0493-2
By: Collaert, N.; Simoen, E.; Put, S.; Leroux, P.; Van Uffelen, M.; Claeys, C.; De Keersgieter, A.;
Determination of process conditions of epoxy dispensing processes using a genetic algorithm based neural fuzzy networks
2011 / IEEE / 978-1-4244-7317-5
By: Ling, S.H.; Dillon, T.S.; Chan, K.Y.; Kwong, C.K.;
Control of Cell Morphology in Polypropylene Foaming
2011 / IEEE / 978-1-4577-1562-4
By: Weiguang Gong; Cheng Zhu; Yuanyuan Meng; Baicun Zheng;
Improved path clustering for adaptive path-delay testing
2012 / IEEE / 978-1-4673-1036-9
By: Kahng, A.B.; Tuck-Boon Chan;
New Flipchip Technology
2012 / IEEE
By: Windemuth, Reinhard; Ishikawa, Takatoshi;
A new CR-delay circuit technology for high-density and high-speed DRAMs
1989 / IEEE
By: Furuyama, T.; Sakurai, K.; Ohsawa, T.; Watanabe, Y.;
Effects of dynamic stressing on nitrided and reoxidized-nitrided chemical-vapor-deposited gate oxides
1989 / IEEE
By: Buhrow, L.; Lee, J.; Kwong, D.-L.; Ting, W.; Hwang, H.-S.; Bowling, R.A.;
Steady-state thermal uniformity and gas flow patterns in a rapid thermal processing chamber
1991 / IEEE
By: Campbell, S.A.; Leighton, J.D.; Liu, B.Y.H.; Knutson, K.L.; Ahn, K.-H.;
Directional deposition of dielectric silicon oxide by plasma enhanced TEOS process
1989 / IEEE
By: Hsieh, J.J.; Flamm, D.L.; Mucha, J.A.; Ibbotson, D.E.;
Step coverage prediction in plasma-enhanced deposition of silicon dioxide from TEOS
1989 / IEEE
By: Raupp, G.B.; Hey, H.P.W.; Cale, T.S.;
Statistical process control used in surface mount assembly
1990 / IEEE
By: Workman, B.; Criscione, J.;
In-situ stress changes of WSi/sub x/ film during polycide process sequence
1990 / IEEE
By: Pramanik, D.; Jain, V.;
High switching speed 1500 V IGBT for CRT deflection circuit
1991 / IEEE / 0-7803-0009-2
By: Suganuma, N.; Shimabukuro, H.; Hoshi, Y.; Seki, Y.; Uchida, Y.; Nishiura, A.;
The control of polysilicon/silicon interface processed by rapid thermal anneal
1991 / IEEE / 0-7803-0103-X
By: Liu, T.M.; Ourmazd, A.; Jeon, D.Y.; Lee, K.F.; Kim, Y.O.;
A real-time expert system for quality control
1992 / IEEE
By: Mah, R.S.H.; Schnelle, K.D.;
Use of highly accelerated life test (HALT) to determine reliability of multilayer ceramic capacitors
1991 / IEEE / 0-7803-0012-2
By: Canner, J.; Confer, R.; Kurtz, S.; Trostle, T.;
The application of computerized processing techniques to manipulate and enhance the flow of non-Newtonian viscoelastic thixotropic materials in a production environment
1991 / IEEE / 0-7803-0012-2
By: D'Ambra, P.A.; Wong, C.P.;
Re-evaluation mode timing simulation
1991 / IEEE / 0-7803-0050-5
By: Chew, M.; Strojwas, A.;
New models for the simulation of polysilicon impurity diffusion sources for a wide range of process conditions
1992 / IEEE / 0-7803-0727-5
By: Sugaya, M.; Kobayashi, T.; Kamohara, S.; Yamamoto, S.;
Process hypercube comparison for signal validation
1991 / IEEE
By: Holbert, K.E.;
CMOS-SRAM soft-error simulation system
1994 / IEEE / 0-7803-1357-7
By: Satoh, S.; Nakayama, N.; Higaki, N.; Tashiro, H.; Sude, R.;
Ultrathin wear-resistant coatings for the tape bearing surface of thin-film magnetic heads for digital compact cassette
1994 / IEEE
By: van Groenou, A.B.; de Jongh, M.; Lasinski, P.; Theunissen, G.S.A.M.; van Zon, J.B.A.; Zieren, V.;
CMOS-SRAM soft-error simulation system
1994 / IEEE / 0-7803-1867-6
By: Satoh, S.; Nakayama, N.; Yamaguchi, S.; Higaki, N.; Tashiro, H.; Sudo, R.;
Spectral response and dark I-V characterization of polycrystalline Si solar cells with conventional and selective emitters
1993 / IEEE / 0-7803-1220-1
By: Rodot, M.; Sivoththaman, S.; Nijs, J.; Ghannam, M.; Sarti, D.; Le Quang Nam;
A robotics package assembly system
1994 / IEEE / 0-7803-2037-9
By: Andrews, J.; Wang, J.; Settles, J.;
In-situ prediction of reactive ion etch endpoint using neural networks
1995 / IEEE
By: May, G.S.; Himmel, C.D.; Baker, M.D.;
Single-wafer and mini-batch wet processing for improved process performance and process characterization
1995 / IEEE / 0-7803-2928-7
By: Dornisch, D.; Wilson, L.; Ward, E.; Brown, E.;
A study of process conditions for plasma ion implantation hydrogenation experiments
1995 / IEEE / 0-7803-2669-5
By: Shu Qin; Bernstein, J.D.; Tsu-Jae King; Chung Chan;
Polycrystalline silicon thin film transistors fabricated at reduced thermal budgets by utilizing fluorinated gate oxidation
1996 / IEEE
By: Hatalis, M.K.; Kouvatsos, D.N.;
Techniques to reduce power in fast wide memories [CMOS SRAMs]
1994 / IEEE / 0-7803-1953-2
By: Horowitz, M.; Amrutur, B.S.;
Charging characteristics of high dose source implants of DMOS devices
1996 / IEEE / 0-7803-3289-X
By: Chen, K.; Tong, T.; Pitzer, D.; Ng, D.; Chang, M.; Tai, S.;
Characterization of stationary and rotating magnetic fields in an MERIE
1997 / IEEE / 0-7803-3990-8
By: Pender, J.T.P.; Buie, M.J.;
The influence of TiN ARC thickness on stress-induced void formation in tungsten-plug vias
1997 / IEEE
By: Walls, J.A.;
High current effects in silicide films for sub-0.25 /spl mu/m VLSI technologies
1998 / IEEE / 0-7803-4400-6
By: Amerasekera, A.; Hu, C.; Banerjee, K.; Kittl, J.A.;
Degradation of breakdown voltage of DMOS due to arsenic implant damage
1998 / IEEE / 0-7803-4752-8
By: Hsieh, C.-M.; Tse, P.K.; Siket, J.M.; Shibib, M.A.;
Modelling tool for chemical-mechanical polishing design and evaluation
1998 / IEEE
By: Desai, M.; Karlsrud, C.; Schleuter, J.; Kim, I.; Runnels, S.R.;
Effects of buried oxide thickness on electrical characteristics of LOCOS-isolated thin-film SOI MOSFETs
1998 / IEEE / 0-7803-4500-2
By: Oh, M.-R.; Kim, H.-K.; Lee, W.-C.; Yang, J.-W.; Koh, Y.-H.; Nam, M.-H.; Oh, J.-H.; Lee, J.-W.;
Correlation between plasma-induced gate oxide damage and charging sensor measurements
1998 / IEEE / 0-9651577-2-5
By: Valentini, G.; Micciche', G.; Ghio, E.; Alba, S.; Batani, D.;
Effect of solder reflow temperature profile on plastic package delamination
1998 / IEEE / 0-7803-4523-1
By: Huang, Y.E.; Burnette, T.; Dody, G.; Hagen, D.;
Characteristics of indium implanted base NPN bipolar transistors
1998 / IEEE / 0-7803-4497-9
By: Zeng, L.; Liying Wu; Taylor, B.; Hayden, J.; Hong Tian;
Control of trench sidewall stress in bias ECR-CVD oxide-filled STI for enhanced DRAM data retention time
1998 / IEEE / 0-7803-4774-9
By: Sakoh, T.; Takaishi, Y.; Komuro, M.; Sakao, M.; Yoshida, K.; Okonogi, K.; Saino, K.; Horiba, S.; Koyama, K.;
Microstructural evolution of low temperature solders in solder joints on a flexible substrate
1998 / IEEE / 0-7803-5141-X
By: Pooh, P.; Corpuz, V.G.; Tsang, C.F.; Muralidharan, G.;
Do chip size limits exist for DCA?
1999 / IEEE / 0-930815-56-4
By: Schubert, A.; Dudek, R.; Leutenbauer, R.; Doring, R.; Kloeser, J.; Oppermann, H.; Tummala, R.; Reichl, H.; Baldwin, D.; Qu, J.; Sitaraman, S.; Swaminathan, M.; Wong, C.P.; Michel, B.;
A model for channel hot carrier reliability degradation due to plasma damage in MOS devices
1999 / IEEE / 0-7803-5220-3
By: Rangan, S.; Ashok, S.; Aur, S.; Amerasekara, A.; Krishnan, S.;
Calibration of a 2D numerical model for the optimization of LOCOS type isolations by response surface methodology
1999 / IEEE / 0-7803-5154-1
By: Hoffmann, T.; Tixier, A.; Senez, V.;
Two-dimensional modeling and simulation for dynamic sheath expansion during plasma immersion ion implantation
1999 / IEEE
By: Shu Qin; Chung Chan; Yuanzhong Xhou;
High permittivity gate insulators TiO/sub 2/ and ZrO/sub 2/
1999 / IEEE / 0-7803-5240-8
By: Gribelyuk, M.; Gladfelter, W.L.; Campbell, S.A.; Taylor, C.; St. Omer, I.; Buchanan, D.; Ma, T.; Smith, R.; Hoilien, N.; He, B.;
Fault detection in boilers using canonical variate analysis
1999 / IEEE / 0-7803-4990-3
By: Borsje, H.J.;
A mechanism of stress-induced metal void in narrow aluminum-based metallization with the HDP CVD oxide dielectric
1999 / IEEE / 0-7803-5174-6
By: Geung Won Kang; U-In Chung; Sun Hu Park; Seung-Heon Song; Sun-Rae Kim; Heok-Sang Oh; Soo Geun Lee;
An empirical breakdown model of the gate oxide under current stress
1999 / IEEE / 0-7803-5187-8
By: Jin-Ho Seo; Woo, J.C.S.;
Haystack syndrome avoidance on massive correlation for probe vs. E-test data through the concurrent use of tree base models and trellis graphics. Application on sub-micron mix-signal product for the determination of the best process conditions for yield maximisation
1999 / IEEE / 0-7803-5217-3
By: Bonal, J.; Sobrino, E.; Ignacio Alonso, J.; Ortega, C.;
Hardware and process dependence of electron shading damage in a high density plasma oxide etch tool
1999 / IEEE / 0-9651577-3-3
By: Werking, J.; Bosch, W.; Ferguson, G.; Flanner, J.; McCormack, D.W., Jr;
Statistical Monte Carlo simulation for dielectric breakdown of oxide thin films: effect of nonuniformity of electron trap generation
1999 / IEEE / 4-930813-98-0
By: Uno, S.; Taniguchi, K.; Okada, K.; Kamakura, Y.;
Computer based modeling for predicting reliability of flip-chip components on printed circuit boards
1999 / IEEE / 0-7803-5502-4
By: Wheeler, D.; Hua Lu; Bailey, C.;
Using rinse resistivity to reduce UPW usage
1999 / IEEE / 0-7803-5502-4
By: McCormack, K.; Ruiz-Yeomans, A.;
Shrinkage predictions of injection moulded parts in semi-crystalline polymers: experimental verification
1999 / IEEE / 0-7803-5670-5
By: Maspoch, M.L.I.; Sanchez-Soto, M.; Ariza, D.; Gordillo, A.;
Threshold voltage design incompatibility between partially-depleted SOI and bulk CMOS transistors
1999 / IEEE / 0-7803-5456-7
By: Van Meer, H.; Jeong-Ho Lyu; De Meyer, K.; Geenen, L.; Kubicek, S.;
Using neural networks to construct models of the molecular beam epitaxy process
2000 / IEEE
By: Bicknell-Tassius, R.; Dagnall, G.; Brown, T.; Lee, K.K.; May, G.S.; Brown, A.;
Adhesion measurement for electronic packaging applications using double cantilever beam method
2000 / IEEE
By: Xiang Dai; Ho, P.S.; Brillhart, M.V.;
Accuracy improvement for CNC system using wavelet-neural networks
2000 / IEEE / 0-7803-5812-0
By: Gadre, V.M.; Suneel, T.S.; Shashidhara, H.L.; Pande, S.S.;
A pulse radar gauge for level measurement and process control
2000 / IEEE / 0-7803-5687-X
By: Motzer, J.;
Numerical device simulation of the composite triple-beat distortion of a cable television amplifier
2000 / IEEE
By: Freeman, J.; Costa, J.; Loechelt, G.H.; Zirkle, T.;
Optimal design of a CMOS op-amp via geometric programming
2001 / IEEE
By: Hershenson, M.delM.; Lee, T.H.; Boyd, S.P.;
Chaos-based random number generators. Part II: practical realization
2001 / IEEE
By: Pihl, J.; Stojanovski, T.; Kocarev, L.;
Chemically induced defects during copper polish
2001 / IEEE / 0-7803-6678-6
By: Feller, A.D.; Fischer, P.B.; Miller, A.E.; Cadien, K.C.;
Robust design for VLSI process and device
2001 / IEEE / 0-7803-6688-3
By: Ming-Ru Chen;
The electrical characteristics of oxide due to processing condition
2001 / IEEE / 0-7803-6352-3
By: Doo-Jin Choi; Nung-Pyo Hong; Jin-Woong Hong; Tae-Hoon Kim; Byung-Ha Choi; Tae-Sun Lee;
Etching, sidewall passivation and microtrenching in contact holes and edge regions
2001 / IEEE / 0-7803-7141-0
By: Abraham-Shrauner, B.; Liu, C.;
Compatibility of candidate high permittivity gate oxides with front and backend processing conditions
2001 / IEEE / 4-89114-021-6
By: Wicaksana, D.; Maria, J.-P.; Kingon, A.I.; Stemmer, S.; Hoffman, C.;
High aspect ratio etching of 2D-photonic crystals in InP/InGaAsP/InP heterostructures
2002 / IEEE / 0-7803-7375-8
By: Anand, S.;
Exploring ISSG process space [Si oxidation]
2001 / IEEE / 0-9638251-0-4
By: Raja, L.L.; Sullivan, N.; Williams, M.; Yokota, Y.; Kee, R.J.;
Comparative study on implant anneal using single wafer furnace and lamp-based rapid thermal processor
2001 / IEEE / 0-9638251-0-4
By: Aizawa, K.; Setokubo, T.; Fukada, T.; Woo Sik Yoo; Komatubara, R.; Takahashi, N.; Ohsawa, T.;
Fabrication and characterization of two-dimensional photonic crystal waveguides etched in InP-based heterostructure
2002 / IEEE / 0-7803-7320-0
By: Jaskorzynska, B.; Qiu, M.; Swillo, M.; Anand, S.; Mulot, M.; Talneau, A.;
The new high voltage level up shifter for HVIC
2002 / IEEE / 0-7803-7262-X
By: Choi, Y.S.; Jeon, C.K.; Kim, S.L.; Kim, M.H.; Kim, J.J.; Song, C.S.; Kang, H.S.;
Damage free dicing method for MEMS devices
2002 / IEEE / 0-7803-7595-5
By: Kato, K.; Matsumoto, Y.; Awatani, Y.;
Optimization of nanocomposite integral capacitor fabrication using neural networks and genetic algorithms
2002 / IEEE / 0-7803-7301-4
By: May, G.S.; Thongvigitmanee, T.;
GIDL simulation and optimization for 0.13 /spl mu/m/1.5 V low power CMOS transistor design
2002 / IEEE / 4-89114-027-5
By: Shi-Charng Ai; Nandakumar, M.; Shaoping Tang; Song Zhao; Ashburn, S.P.; Scott, D.B.; Shyh-Horng Yang; Youngmin Kim; Chatterjee, A.; Sridhar, S.;
Growth modes and characterization of thin RTP silicon oxides
2002 / IEEE / 0-7803-7465-7
By: Ludsteck, A.; Eisele, I.; Nenyei, Z.; Schulze, J.;
Compensation method for tension disturbance due to an unknown roll shape in a web transport system
2002 / IEEE / 0-7803-7420-7
By: Kee-hyun Shin; Seung-Ho Song; Hyun-kyoo Kang; Jeung-In Jang;
Visual data mining and monitoring in steel processes
2002 / IEEE / 0-7803-7420-7
By: Obeso, F.; Diez, A.B.; Diaz, I.; Cuadrado, A.A.; Gonzalez, J.A.;
Electrical discharge machining experiences with a resonant power supply
2002 / IEEE / 0-7803-7474-6
By: Bracho, S.; Azcondo, F.J.; Chiquito, L.A.; Casanueva, R.;
Co-integration of acoustic-optic functional devices with semiconductor photodetector using film bonding
2002 / IEEE / 0-7803-7582-3
By: Aoki, Y.; Okamoto, S.; Koh, K.; Hohkawa, H.; Kaneshiro, C.;
Leakage behavior and reliability assessment of tantalum oxide dielectric MIM capacitors
2003 / IEEE / 0-7803-7649-8
By: Walls, J.; Ramprasad, R.; Remmel, T.;
Interface-engineered junctions with YbBaCuO as the counter-electrode
2003 / IEEE
By: Nakayama, K.; Katsuno, H.; Yoshida, J.; Nagano, T.; Inoue, S.;
Copper gate AlGaN/GaN HEMT with low gate leakage current
2003 / IEEE
By: Jin-Ping Ao; Ohno, Y.; Naoi, Y.; Kubota, N.; Kikuta, D.;
Compensation method for tension disturbance due to an unknown roll shape in a web transport system
2003 / IEEE
By: Kee-Hyun Shin; Seung-Ho Song; Hyun-Kyoo Kang; Jeung-In Jang;
Semiconductor manufacturing process visualization
2003 / IEEE / 0-7803-7952-7
By: Shannon, T.; Turner, D.; Abercrombie, D.; McNames, J.;
Development of packaging for MEMS inertial sensors
2004 / IEEE / 0-7803-8416-4
By: Marinis, T.F.; Pryputniewicz, R.J.; Furlong, C.; Soucy, J.W.;
Embedded optical interconnections on printed wiring boards
2004 / IEEE / 0-7803-8365-6
By: Sang-Yeon Cho; Ogawa, N.; Nonaka, T.; Suzuki, T.; Jokerst, N.M.; Sang-Woo Seo;
Enhancement of underfill capillary flow in flip-chip packaging by means of the inertia effect
2004 / IEEE
By: Chao-Ming Lin;
A comprehensive varactor study for advanced CMOS RFIC design
2005 / IEEE / 0-7803-9058-X
By: Chern, G.J.; Chao, C.P.; Chang, C.S.; Chan, Y.J.; Huang, C.F.; Ho, C.C.; Chen, C.H.; Wu, C.C.;
PCA-based network modeling using standardized X-ray diffraction data for the electrical characteristics of the HfO2 thin films grown by MOMBE
2007 / IEEE / 978-1-4244-1891-6
By: Jae-Min Myoung; Moon-Ho Ham; Chang Eun Kim; Pyung Moon; Young-Don Ko; Ilgu Yun;
Scalable 3-D Fin-Like Poly-Si TFT and Its Nonvolatile Memory Application
2008 / IEEE
By: Tikhonovsky, A.; Wenxu Xianyu; Huaxiang Yin; Young Soo Park;
A Thermally Enhanced Halogen Free Laminate Material to Reduce the Impact of Lead Free Process
2008 / IEEE / 978-1-4244-3622-4
By: Lee, G.; Lin, J.; Liang, P.;
Post-cycling data retention failure in multilevel nor flash memory with nitrided tunnel-oxide
2009 / IEEE / 978-1-4244-2888-5
By: Kijoon Kim; Chankwang Park; Bong-Yong Lee; Sang-Eun Lee; Lee, W.H.; Hyun-Min Lee; Chang-Hyun Hur; Hwanbae Yoo;
Field Synergy Principle to Square and Trapezoid Types Fuel Cell Bipolar Plate of Mold Injection
2010 / IEEE / 978-1-4244-4812-8
By: Shiuh Ming Chang; Jenn Kun Kuo;
Improved numerical constraint disposal method for process conditions in sheet metal forming simulation
2010 / IEEE / 978-1-4244-7739-5
By: Ting Du; Yuqi Liu; Zhibing Zhang; Shaohui Xie;
Effect of Process Conditions on Microstructure and Corrosion Resistance of Cold-Sprayed Ti Coatings
2008 / Springer Science+Business Media / 1059-9630
By: Qi Wang; Jun Wang; Bao-Rong Hou; Wen-Ya Li; Hong-Ren Wang;

Next Page
Return To Top