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Topic: Layout

Results

Design automation of MOS artwork

1974 / IEEE
By: Mattison, Roland L.;

Standard cell approach for generating custom CMOS/SOS devices using a fully automatic layout program

1981 / IEEE
By: Smith, Allan M.; Noto, Richard; Feller, Albert;

Automated Universal Array

1981 / IEEE
By: Noto, Richard; Suskind, Barry; Borgini, Fred;

A methodology for custom VLSI layout

1983 / IEEE
By: Breuer, Melvin A.; Kumar, Anshul;

CAE workstations and semicustom IC vendors offer increased design flexibility

1986 / IEEE
By: Hampton, L.;

TRACAS: An automatic router for circuits designed with the MDMOS symbolism

1985 / IEEE
By: Leblond, A.;

APOLLON, A data-path silicon compiler

1985 / IEEE
By: Jamier, R.; Jerraya, A.A.;

Feedback in silicon compilers

1985 / IEEE
By: Friedman, E.G.;

Silicon compilation based on a data-flow paradigm

1985 / IEEE
By: Krekelberg, D.E.; Sobelman, G.E.; Jhon, C.S.;

Approaches toward silicon compilation

1985 / IEEE
By: Hirschhorn, S.S.; Goldberg, A.V.; Lieberheer, K.J.;

Standard cell VLSI design: A tutorial

1985 / IEEE
By: Ganesan, A.; Kessler, A.J.;

On yield-optimizing design rules

1985 / IEEE
By: Heavlin, W.D.; Beck, C.;

Computer-Aided Design: Leading or responding?

1983 / IEEE
By: Wisniewski, John A.; Daniel, Marvin E.; Acken, John M.;

Simulation of typing process on different layouts with emphasis on distance and motion issues

1985 / IEEE
By: El-Azhary, I.; Suliman, S.M.A.; Azmi, A.M.;

A layout algorithm for data flow diagrams

1986 / IEEE
By: Tamassia, R.; Nardelli, E.; Batini, C.;

Manufacturing-based simulation: An overview

1987 / IEEE
By: Director, S.W.;

RF Front-End Test Using Built-in Sensors

2011 / IEEE
By: Abdallah, L.; Kelma, C.; Mir, S.; Stratigopoulos, H.-G.;

Analysis and Design of Crosstalk Noise Reduction for Coupled Striplines Inserted Guard Trace With an Open-Stub on Time-Domain in High-Speed Digital Circuits

2011 / IEEE
By: Jia-Hung Shiu; Guang-Hwa Shiue; Po-Wei Chiu;

LTCC Layer-to-Layer Misalignment-Tolerant Coupled Inductors and Their Application to Bandpass Filter and Helical Inductors

2011 / IEEE
By: Tzu-Wei Chao; Hsin-Chia Lu; Yien-Tien Chou; Tuck-Boon Chan; Yi-Long Chang;

Human mobility models for opportunistic networks

2011 / IEEE
By: Passarella, A.; Conti, M.; Boldrini, C.; Karamshuk, D.;

Multimedia broadcast multicast service: new transmission schemes and related challenges

2011 / IEEE
By: Gruber, M.; Zeller, D.;

Scalable service deployment on software-defined networks

2011 / IEEE
By: Meer, H.; Paler, A.; Fischer, A.; Lefevre, L.; Rubio-Loyola, J.; Serrat, J.; Astorga, A.; Galis, A.;

Focus+Context Metro Maps

2011 / IEEE
By: Ming-Te Chi; Yu-Shuen Wang;

Direct Monte Carlo Simulations of Air Bearing Characteristics on Patterned Media

2011 / IEEE
By: Wei Hua; Shengkai Yu; Weidong Zhou; Kyaw Sett Myo;

An Area-Efficient 65 nm Radiation-Hard Dual-Modular Flip-Flop to Avoid Multiple Cell Upsets

2011 / IEEE
By: Furuta, J.; Hamanaka, C.; Yamamoto, R.; Onodera, H.; Kobayashi, K.;

Circuit-Level Layout-Aware Single-Event Sensitive-Area Analysis of 40-nm Bulk CMOS Flip-Flops Using Compact Modeling

2011 / IEEE
By: Massengill, L.W.; Bhuva, B.L.; Sternberg, A.L.; Jagannathan, S.; Kauppila, J.S.; Kauppila, A.V.; Ball, D.R.; Haeffner, T.D.; Loveless, T.D.;

Voltage-Drop Aware Analytical Placement by Global Power Spreading for Mixed-Size Circuit Designs

2011 / IEEE
By: Yi-Lin Chuang; Yao-Wen Chang; Po-Wei Lee;

Generic Radiation Hardened Photodiode Layouts for Deep Submicron CMOS Image Sensor Processes

2011 / IEEE
By: Virmontois, C.; Cervantes, P.; Goiffon, V.; Estribeau, M.; Magnan, P.; Corbiere, F.;

Product Futures

2011 / IEEE
By: Kahng, Andrew B.;

Data Management and Layout for Shingled Magnetic Recording

2011 / IEEE
By: Schwarz, T.; Paris, J.; Miller, E.L.; Long, D.D.E.; Holliday, J.; Amer, A.;

Multiwavelength Selective IR Emission Using Surface Plasmon Polaritons for Gas Sensing

2011 / IEEE
By: Kumagai, S.; Sawada, T.; Masuno, K.; Sasaki, M.;

A 10-Bit Multichannel Digitizer ASIC for Detectors in Particle Physics Experiments

2012 / IEEE
By: Kulis, S.; Fiutowski, T.; Swientek, K.; Idzik, M.; Przyborowski, D.;

Tip of the Tongue Selectivity and Motor Learning in the Palatal Area

2012 / IEEE
By: Caltenco, H.A.; Struijk, L.N.S.A.; Struijk, J.; Bentsen, B.; Boudreau, S.A.; Lontis, E.R.;

How Capacity Limits of Attention Influence Information Visualization Effectiveness

2012 / IEEE
By: Whitney, D.; Haroz, S.;

A User Study on Curved Edges in Graph Visualization

2012 / IEEE
By: Dong-Han Ham; Passmore, P.; Rooney, C.; Kai Xu; Nguyen, P.H.;

Compressed Adjacency Matrices: Untangling Gene Regulatory Networks

2012 / IEEE
By: Dinkla, K.; van Wijk, J.J.; Westenberg, M.A.;

The DeepTree Exhibit: Visualizing the Tree of Life to Facilitate Informal Learning

2012 / IEEE
By: Phillips, B.C.; Horn, M.S.; Block, F.; Chia Shen; Evans, E.M.; Diamond, J.;

Memorability of Visual Features in Network Diagrams

2012 / IEEE
By: Marriott, K.; Goncu, C.; Wybrow, M.; Purchase, H.;

Capturing the Design Space of Sequential Space-Filling Layouts

2012 / IEEE
By: Broeskema, B.; Baudel, T.;

Intelligent Graph Layout Using Many Users' Input

2012 / IEEE
By: Yifan Hu; Limei Che; Xiaoru Yuan; Xin Zhang;

Interaction Support for Visual Comparison Inspired by Natural Behavior

2012 / IEEE
By: Tominski, C.; Johansson, J.; Forsell, C.;

Using Aging to Visually Uncover Evolutionary Processes on Networks

2012 / IEEE
By: di Bernardo, M.; Gorochowski, T.E.; Grierson, C.S.;

Impossible Spaces: Maximizing Natural Walking in Virtual Environments with Self-Overlapping Architecture

2012 / IEEE
By: Finkelstein, S.; Lipps, Z.; Suma, E.A.; Bolas, M.; Krum, D.M.;

Design Optimization for Digital Circuits Built With Gate-All-Around Silicon Nanowire Transistors

2012 / IEEE
By: Yuchao Liu; Yangyuan Wang; Qiumin Xu; Jing Zhuge; Runsheng Wang; Ru Huang;

A Two-Dimensional Analysis Method on STI-Aware Layout-Dependent Stress Effect

2012 / IEEE
By: Yan Wang; Yaohua Tan; Zuochang Ye; Xiaojian Li;

Efficient Analysis of Substrate Integrated Waveguide Devices Using Hybrid Mode Matching Between Cylindrical and Guided Modes

2012 / IEEE
By: Belenguer, A.; Esteban, H.; Diaz Caballero, E.; Boria, V.;

A Rigorous Design Methodology for Compact Planar Branch-Line and Rat-Race Couplers With Asymmetrical T-Structures

2012 / IEEE
By: Chao-Hsiung Tseng; Chih-Lin Chang;

Single-Event Transient Testing of Low Dropout PNP Series Linear Voltage Regulators

2012 / IEEE
By: Dakai Chen; Adell, P.C.; Allen, G.R.; Musil, P.;

Design of Coil Length of On-Chip Transformer With High Turn Ratio and High Coupling Performance

2012 / IEEE
By: Heng-Ming Hsu; Nai-Chen Liu; Ting-Hao Peng; Jhao-Hsiang Huang;

Wideband Dual-Mode Microstrip Filter Using Short-Ended Resonator With Centrally Loaded Inductive Stub

2012 / IEEE
By: Kun Deng; Tao Su; Bian Wu; Shou-Jia Sun; Chang-Hong Liang;

Split-Gate-Enhanced UMOSFET With an Optimized Layout of Trench Surrounding Mesa

2012 / IEEE
By: Ying Wang; Wen-li Jiao; Hai-Fan Hu;

Impact of Circuit Placement on Single Event Transients in 65 nm Bulk CMOS Technology

2012 / IEEE
By: Chen Shuming; He Yibai; Huang Pengcheng; Du Yankang; Qin Junrui; Liu Biwei; Liang Bin; Chi Yaqing; Chen Jianjun;

Identification of Radiation Induced Dark Current Sources in Pinned Photodiode CMOS Image Sensors

2012 / IEEE
By: Magnan, P.; Virmontois, C.; Goiffon, V.; Martin-Gonthier, P.; Estribeau, M.; Cervantes, P.; Paillet, P.; Girard, S.; Gaillardin, M.; Place, S.;

Single-Event-Hardened CMOS Operational Amplifier Design

2012 / IEEE
By: Holman, W. T.; Armstrong, S. E.; Loveless, T. D.; Kauppila, J. S.; Atkinson, N. M.; Blaine, R. W.; Massengill, L. W.;

Influence of User-Controlled Parameters in Alpha Particle-Induced Single-Event Error Rates in Commercial SRAM Cells

2012 / IEEE
By: Bhuva, B. L.; Chatterjee, I.; Wong, R.; Wen, S.-J.;

WORDGRAPH: Keyword-in-Context Visualization for NETSPEAK's Wildcard Search

2012 / IEEE
By: Stein, B.; Trenkmann, M.; Potthast, M.; Gruendl, H.; Riehmann, P.; Froehlich, B.;

Visualizing Network Traffic to Understand the Performance of Massively Parallel Simulations

2012 / IEEE
By: Langer, S.H.; Schulz, M.; Isaacs, K.E.; Gamblin, T.; Bremer, P.-T.; Bhatele, A.; Levine, J.A.; Landge, A.G.; Pascucci, V.;

Common-Gate Load-Pull With Q-Band Application

2012 / IEEE
By: Parker, A.E.; Young, A.C.; Mahon, S.J.;

Exploring Flow, Factors, and Outcomes of Temporal Event Sequences with the Outflow Visualization

2012 / IEEE
By: Gotz, D.; Wongsuphasawat, K.;

PivotPaths: Strolling through Faceted Information Spaces

2012 / IEEE
By: Ramos, G.; Riche, N.H.; Dork, M.; Dumais, S.;

Unsupervised Construction of an Indoor Floor Plan Using a Smartphone

2012 / IEEE
By: Yohan Chon; Hyojeong Shin; Hojung Cha;

Visualizing Dynamic Data with Maps

2012 / IEEE
By: Mashima, D.; Yifan Hu; Kobourov, S.;

Constrained Placement Methodology for Reducing SER Under Single-Event-Induced Charge Sharing Effects

2012 / IEEE
By: Millan, E. S.; Lindoso, A.; Entrena, L.; Kastensmidt, F.; Almeida, F.; Pagliarini, S.;

An Embedded Dynamic Voltage Scaling (DVS) System Through 55 nm Single-Inductor Dual-Output (SIDO) Switching Converter for 12-Bit Video Digital-to-Analog Converter

2012 / IEEE
By: Wen-Shen Chou; Tzu-Chi Huang; Yu-Huei Lee; Yao-Yi Yang; Yi-Ping Su; Ke-Horng Chen; Fu-Lung Hsueh; Ying-Hsi Lin; Chao-Cheng Lee; Kuei-Ann Wen; Ying-Chih Hsu; Yung-Chow Peng; Chen-Chih Huang;

Novel Layout Technique for N-Hit Single-Event Transient Mitigation via Source-Extension

2012 / IEEE
By: Yaqing Chi; Yibai He; Shuming Chen; Jianjun Chen; Biwei Liu; Bin Liang; Junrui Qin;

A Wideband, Dual-Path, Millimeter-Wave Power Amplifier With 20 dBm Output Power and PAE Above 15% in 130 nm SiGe-BiCMOS

2012 / IEEE
By: Yi Zhao; Long, J.R.;

SET Characterization and Mitigation in 65-nm CMOS Test Structures

2012 / IEEE
By: Rezgui, S.; Tien, J.; Won, R.;

A Switcher ASIC Design for Use in a Charge-Pump Detector

2012 / IEEE
By: Misra, D.; Siddons, D.P.; De Geronimo, G.; Zhi Yong Li; Vernon, E.; Tyson, T.A.;

Differential Charge Cancellation (DCC) Layout as an RHBD Technique for Bulk CMOS Differential Circuit Design

2012 / IEEE
By: Hooten, N.C.; Armstrong, S.E.; Kauppila, J.S.; Atkinson, N.M.; Warner, J.H.; Blaine, R.W.; Massengill, L.W.; Holman, W.T.;

A 21 nm High Performance 64 Gb MLC NAND Flash Memory With 400 MB/s Asynchronous Toggle DDR Interface

2012 / IEEE
By: Jaeyong Jeong; Seonghwan Seo; Jaewoo Lim; Hyunggon Kim; Taesung Lee; Jinho Ryu; Chulbum Kim; Young-Hyun Jun; Young-Ho Lim; Kyehyun Kyung; Duheon Song; Jin-Man Han; Kwangil Park; Woopyo Jeong; Changhyun Cho; Yongsik Yim; Seongsoon Cho; Pansuk Kwak; Dooseop Lee; Inyoul Lee; Bokeun Kim; Hongsoo Jeon;

Impact of Strained-Si PMOS Transistors on SRAM Soft Error Rates

2012 / IEEE
By: Bhuva, B. L.; Mahatme, N. N.; Oates, A. S.; Fang, Y.-P.;

A Hierarchy-Based Distributed Algorithm for Layout Geometry Operations

2012 / IEEE
By: Yu-Chuan Pi; Sinha, S.; Kai-Ti Hsu; Tsung-Yi Ho;

Synthesis Methodology Applied to a Tunable Patch Filter With Independent Frequency and Bandwidth Control

2012 / IEEE
By: Salete Correra, F.; Lacorte Caniato Serrano, A.; Ferrari, P.; Tan-Phu Vuong;

A Correlation-Considered Variation-Aware Interconnect Parasitic Profile Extraction Method

2012 / IEEE
By: Shaojian, H.; Xi, L.; Zheng, R.; Yanling, S.; Yuhang, Z.; Shoumian, C.;

Layout-Aware Switching Activity Localization to Enhance Hardware Trojan Detection

2012 / IEEE
By: Salmani, H.; Tehranipoor, M.;

AlGaN/GaN HEMT With Distributed Gate for Channel Temperature Reduction

2012 / IEEE
By: Hung, H.A.; Darwish, A.M.; Ibrahim, A.A.;

Analytical Design of Two-Mode Dual-Band Filters Using E-Shaped Resonators

2012 / IEEE
By: Yi-Ting Kuo; Chi-Yang Chang;

SLIDER: Simulation of Layout-Injected Defects for Electrical Responses

2012 / IEEE
By: Wing Chiu Tam; Blanton, R.D.;

Design-Aware Mask Inspection

2012 / IEEE
By: Gupta, P.; Kagalwalla, A.A.; McDonald, S.; Progler, C.J.;

Stepped-Impedance Coupled Resonators for Implementation of Parallel Coupled Microstrip Filters With Spurious Band Suppression

2012 / IEEE
By: Srisathit, K.; Worapishet, A.; Surakampontorn, W.;

Application of IP-Based Analog Platforms in the Design of Neuromimetic Integrated Circuits

2012 / IEEE
By: Renaud, S.; Tomas, J.; Lewis, N.; Levi, T.;

Estimation of dc Performance of a Lateral Power MOSFET Using Distributed Cell Model

2012 / IEEE
By: Patra, A.; Mukhopadhyay, S.; Ghosh, J.; Tawen Mei; Culpepper, B.;

Assembling 2-D Blocks Into 3-D Chips

2012 / IEEE
By: Lienig, J.; Markov, I.L.; Knechtel, J.;

DRE: A Framework for Early Co-Evaluation of Design Rules, Technology Choices, and Layout Methodologies

2012 / IEEE
By: Ghaida, R.S.; Gupta, P.;

Improving Diagnosis Through Failing Behavior Identification

2012 / IEEE
By: Blanton, R.D.; Xiaochun Yu;

SimPL: An Effective Placement Algorithm

2012 / IEEE
By: Myung-Chul Kim; Markov, I.L.; Dong-Jin Lee;

Native-Conflict and Stitch-Aware Wire Perturbation for Double Patterning Technology

2012 / IEEE
By: Yao-Wen Chang; Szu-Yu Chen; Shao-Yun Fang;

Layout-Aware Multiple Scan Tree Synthesis for 3-D SoCs

2012 / IEEE
By: Li, K.S.-M.; Yi-Yu Liao;

Minimizing Multiple Triggering Effect in Diode-Triggered Silicon-Controlled Rectifiers for ESD Protection Applications

2012 / IEEE
By: Shurong Dong; Meng Miao; Yan Han; Hongwei Li; Fei Ma; Liou, J.J.; Jie Zeng; Jian Wu;

E-Beam Lithography Stencil Planning and Optimization With Overlapped Characters

2012 / IEEE
By: Kun Yuan; Pan, D.Z.; Bei Yu;

Statistical Entity Extraction From the Web

2012 / IEEE
By: Wen, J.-R.; Nie, Z.; Ma, W.-Y.;

A Compact Dynamic-Performance-Improved Current-Steering DAC With Random Rotation-Based Binary-Weighted Selection

2012 / IEEE
By: Tai-Haur Kuo; Wei-Te Lin;

Constrained Multiobjective Optimization of a Common-Mode Suppression Filter

2012 / IEEE
By: Vande Ginste, D.; Rogier, H.; Couckuyt, I.; Gazda, C.; Dhaene, T.;

Compact Configuration for Common Mode Filter Design based on Planar Electromagnetic Bandgap Structures

2012 / IEEE
By: Raimondo, L.; de Paulis, F.; Orlandi, A.; Archambeault, B.; Connor, S.;

Layout-Dependent Strain Optimization for p-Channel Trigate Transistors

2012 / IEEE
By: Maitra, K.; Mujumdar, S.; Datta, S.;

LDMOS Transistor High-Frequency Performance Enhancements by Strain

2012 / IEEE
By: Chee Wee Liu; Kai-Li Wang; Yu-Chi Yang; Ming-Yi Chen; Wen-Shiang Liao; Kun-Ming Chen; Chia-Sung Chiu; Bo-Yuan Chen; Guo-Wei Huang; Chih-Hua Hsiao;

Yield Learning Through Physically Aware Diagnosis of IC-Failure Populations

2012 / IEEE
By: Poku, O.; Nelson, J.E.; Xiaochun Yu; Tam, W.C.; Blanton, R.D.;

Evaluating Depth Perception of 3D Stereoscopic Videos

2012 / IEEE
By: Raake, A.; Lebreton, P.; Le Callet, P.; Barkowsky, M.;

Physically-Aware Analysis of Systematic Defects in Integrated Circuits

2012 / IEEE
By: Blanton, R. D.; Tam, W. C.;

Guest Editors' introduction: On-chip structures for smarter silicon

2012 / IEEE
By: Winemberg, L.; Tehranipoor, M.;

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