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Mixed mode simulation of SRAM FinFETS
2012 / IEEE / 978-1-4577-1546-4
This item was taken from the IEEE Conference ' Mixed mode simulation of SRAM FinFETS ' The MG FinFETs are designed and its results are compared with the polysiliconFinFETs. The 6T SRAM cell is designed using both gate materials and their variations will be analysed. The 20nm tied gate device is compared with independent gate. The SRAM cell stability enhancement is improved using the IDG-FinFETs by controlling the individual V
6t Sram Cell
Tied Gate Device
Cell Stability Enhancement
Random Access Memory
Cmos Integrated Circuits
Idg- Independent Double Gate
Mixed Mode Simulation
Size 20 Nm