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A physics-based simple series resistance extraction methodology

By: Campbell, J.P.; Cheung, K.P.;

2011 / IEEE / 978-1-61284-134-2


This item was taken from the IEEE Conference ' A physics-based simple series resistance extraction methodology ' Series resistance has become a serious obstacle encountered in the development of advanced CMOS devices. At the same time, series resistance quantification in these same advanced CMOS devices is a difficult challenge. In this study, we demonstrate a very simple series resistance extraction procedure which is derived from the ratio of two linear ID-VG measurements on a single device. The physics of this method is intuitively simple and the assumptions readily justifiable. The validity of this technique has been verified by a self-consistent methodology as well as the reproduction of a known external series resistance.