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Enhanced performance in SOI FinFETs with low series resistance by aluminum implant as a solution beyond 22nm node

By: Jammy, R.; Kirsch, P.; Hobbs, C.; Smith, C.; Akarvardar, K.; Lin, S.; Franca, D.L.; Stamper, H.O.; Bennett, S.; Rodgers, M.P.; Oh, J.; Lian, S.; Ngai, T.; Loh, W.Y.; Young, C.D.; Ok, I.;

2010 / IEEE / 978-1-4244-5450-1

Description

This item was taken from the IEEE Conference ' Enhanced performance in SOI FinFETs with low series resistance by aluminum implant as a solution beyond 22nm node ' We present an approach to scale Rext while maintaining control of short channel effects in scaled finFETs. For FETs with fins <20nm, an enhancement of 19% in drain current was achieved in nFETs by incorporating Al at silicide-Si interface. This Al implantation while reducing the schottky barrier height for n-Si contact by 0.4 eV, does not degrade the integrity of the junction extensions or gate stacks. These attributes constitute a simple non-planar cMOS integration sequence for enhancing future high performance technology nodes.