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The fabrication of low leakage junction with ultra shallow profile by the combination annealing of 10-ms low power and 2-ms high power FLA
By: Ikeda, K.; Aoyama, T.; Kato, S.; Onizawa, T.; Ohji, Y.;
2006 / IEEE / 978-1-4244-3308-7
This item was taken from the IEEE Conference ' The fabrication of low leakage junction with ultra shallow profile by the combination annealing of 10-ms low power and 2-ms high power FLA ' We propose the suitable FLA method for pFET device activation by using flexibly-shaped-pulse FLA (FSP-FLA). For the activation annealing by FLA on B without pre-amorphous implantation (PAI) process, increase in preheat temperature before flash is the most effective. By using FSP-FLA, <1000 �C 10-ms preheat was performed. It achieves very shallow and high activated junction without PAI equivalently to that by the conventional FLA with PAI. By using the FSP-FLA without PAI, drastically reductions of the junction leakage (JL) both of p- and nFET were achieved.
Low Power Fla
High Power Fla
Pfet Device Activation
Flash Lamp Annealing
Time 10 Ms
Optical Pulse Shaping
Low Leakage Junction Fabrication
Time 2 Ms
Incoherent Light Annealing
Cmos Integrated Circuits