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High-�/metal gate low power bulk technology - Performance evaluation of standard CMOS logic circuits, microprocessor critical path replicas, and SRAM for 45nm and beyond

By: Park, D.-G.; Stein, K.; Khare, M.; Divakaruni, R.; Steegen, A.; Lindsay, R.; Sherony, M.; Narayanan, V.; Samavedam, S.; Theon, V.-Y.; Chudzik, M.; Schepis, D.; Haetty, J.; Chowdhury, M.; Kanarsky, T.; Yan, W.; Chen, J.; Zhuang, H.; Jaeger, D.; Chen, X.; Loesing, R.; Tang, T.; Hatzistergos, M.; Moumen, N.; von Arnim, K.; Han, S.; Schruefer, K.; Lee, Y.; Han, J.-P.; Li, W.; Yin, H.; Pacha, C.; Kim, N.; Ostermayr, M.; Eller, M.; Kim, S.; Kim, K.;

2009 / IEEE / 978-1-4244-2784-0

Description

This item was taken from the IEEE Conference ' High-�/metal gate low power bulk technology - Performance evaluation of standard CMOS logic circuits, microprocessor critical path replicas, and SRAM for 45nm and beyond ' This paper presents performance evaluation of high-�/metal gate (HK/MG) process on an industry standard 45nm low power microprocessor built on bulk substrate. CMOS devices built with HK/MG demonstrate 50% improvement in NFET and 65% improvement in PFET drive current when compared with industry standard 45nm Poly/SiON devices. No additional stress elements were used for this performance gain. The critical path circuits of this low power microprocessor built with HK/MG show dynamic performance gain over 50% at same supply voltage and 36% lower dynamic energy at same performance. Superior SRAM minimum operating voltage characteristics are achieved due to Vt variability reduction from HK/MG. Analog circuit functionality is demonstrated by a fully integrated PLL circuitry without any modification to process.