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Miniaturization design of backside-via structures underneath collector-Up HBTs using A 3-D finite-element model
By: Chou, J.H.; Lee, P.H.; Tseng, H.C.;
2008 / IEEE / 978-1-4244-2739-0
Description
This item was taken from the IEEE Conference ' Miniaturization design of backside-via structures underneath collector-Up HBTs using A 3-D finite-element model ' To carry out the miniaturization design of backside-via packaging structures underneath collector-up HBTs, a 3-D finite-element model has been developed for analyzing temperature-distribution phenomena within the configurations. The results are demonstrated on the three-finger InGaP/GaAs collector-up HBT. Compared to previous reports, backside-via structures can be further reduced by 42% while maintaining the same heat-dissipation performance.
Related Topics
Heterojunction Bipolar Transistors
Iii-v Semiconductors
Indium Compounds
Semiconductor Device Models
Ingap-gaas
Backside Via Structures Underneath Collector Up Hbt
3d Finite Element Model
Temperature Distribution Phenomena
Heat Dissipation Performance
Heterojunction Bipolar Transistors
Temperature Distribution
Fingers
Finite Element Methods
Packaging
Solid Modeling
Electronic Packaging Thermal Management
Gallium Arsenide
Finite Element Analysis
Semiconductor Device Packaging
Engineering
Miniaturization Design
