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A Serial Logarithmic Number System ALU
By: Vouzis, P.D.; Arnold, M.G.;
2007 / IEEE / 0-7695-2978-X
This item was taken from the IEEE Conference ' A Serial Logarithmic Number System ALU ' Serial arithmetic uses less hardware than parallel arithmetic. Serial floating point (FP) is slower than parallel FP. The Logarithmic Number System (LNS) simplifies operations, but a fast serial implementation of LNS has never been proposed previously. This paper presents a fast bitserial LNS that combines a novel serial implementation of Mitchell's method and a new error correction method that is compatible with least-significant-bit-first serial arithmetic. Keywords: Serial Arithmetic, Logarithmic Number System.
Finite State Machines
Serial Logarithmic Number System
Fast Bit-serial Lns
Least-significant-bit-first Serial Arithmetic
Error Correction Method