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Ta2O5 Interfacial Layer between GST and W Plug enabling Low Power Operation of Phase Change Memories

By: Matsui, Y.; Kurotsuchi, K.; Moniwa, M.; Iwasaki, T.; Moriya, H.; Takaura, N.; Terao, M.; Koga, T.; Hanzawa, S.; Matsuzaki, N.; Fujisaki, Y.; Kinoshita, M.; Morikawa, T.; Tonomura, O.;

2006 / IEEE / 1-4244-0438-X

Description

This item was taken from the IEEE Conference ' Ta2O5 Interfacial Layer between GST and W Plug enabling Low Power Operation of Phase Change Memories ' A novel memory cell for phase-change memories (PCMs) that enables low-power operation has been developed. Power (i.e., current and voltage) for the cell is significantly reduced by inserting a very thin Ta2O5 film between GeSbTe (GST) and a W plug. The Ta2O5 interfacial layer works not only as a heat insulator enabling effective heat generation in GST but also as an adhesion layer between GST and SiO2 underneath. Nonetheless, sufficient current flows through the interfacial layer due to direct tunneling. A low programming power of 1.5 V/100 ¿A can therefore be obtained even on a W plug with a diameter of 180 nm fabricated using standard 0.13-¿m CMOS technology. In addition, the uniformity and repeatability of cell resistance are excellent because of the inherently stable Ta2O5 film properties.