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Integration of dual metal gate CMOS with TaSiN (NMOS) and Ru (PMOS) gate electrodes on HfO/sub 2/ gate dielectric
By: Barnett, J.; Huffman, C.; Song, S.C.; Zhang, Z.B.; Lee, B.H.; Sassman, B.; Moumen, N.; Sim, J.H.; Bae, S.H.; Akbar, M.S.; Hussain, M.; Majhi, P.; Alshareef, H.;
2005 / IEEE / 4-900784-00-1
This item was taken from the IEEE Conference ' Integration of dual metal gate CMOS with TaSiN (NMOS) and Ru (PMOS) gate electrodes on HfO/sub 2/ gate dielectric ' We report the process module development results and device characteristics of dual metal gate CMOS with TaSiN and Ru gate electrodes on HfO/sub 2/ gate dielectric. The wet etch of TaSiN had a minimal impact on HfO/sub 2/ (/spl Delta/EOT<1/spl Aring/). A plasma etch process has been developed to etch Ru/TaN/Poly (PMOS) and TaSiN/Ru/TaN/Poly (NMOS) gate stacks simultaneously. Well behaved dual metal gate CMOS transistors have been demonstrated with L/sub g/ down to 85nm.
Process Module Development
Plasma Etch Process
Dual Metal Gate Cmos Transistors
High-k Gate Dielectrics
Cmos Integrated Circuits
Plasma Deposited Coatings