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Practical finFET design considering GIDL for LSTP (low standby power) devices
By: Hane, M.; Takeuchi, K.; Tanaka, K.;
2005 / IEEE / 0-7803-9268-X
This item was taken from the IEEE Conference ' Practical finFET design considering GIDL for LSTP (low standby power) devices '
Low Standby Power Devices
Gate Induced Drain Leakage
National Electric Code
Silicon On Insulator Technology
Semiconductor Device Models
3d Device Simulations