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ATLAS DataFlow: the read-out subsystem, results from trigger and data-acquisition system testbed studies and from modeling

By: Vermeulen, J.; Abolins, M.; Alexandrav, I.; Amorim, A.; Dos Anjos, A.; Badescu, E.; Barros, N.; Beck, H.P.; Blair, R.; Burckhart-Chromek, D.; Caprini, M.; Ciobotaru, M.; Corso-Radu, A.; Cranfield, R.; Crone, G.; Dawson, J.; Dobinson, R.; Dobson, M.; Drake, G.; Ermoline, Y.; Ferrari, R.; Ferrer, M.L.; Francis, D.; Gadomski, S.; Gameiro, S.; Gorini, B.; Green B; Gruwe, M.; Haas, S.; Haberichter, W.; Haeberli, C.; Hasegawa, Y.; Hauser, R.; Hinkelbein, C.; Hughes-Jones, R.; Joos, M.; Kazarov, A.; Kieft, G.; Klose D; Kolos, S.; Korcyl, K.; Kordas, K.; Kotov, V.; Kugel, A.; Lankford, A.; Lehmann, G.; LeVine, M.J.; Mapelli, L.; Martin, B.; McLaren, R.; Meirosu, C.; Mineev, M.; Misiejuk, A.; Mornacchi, G.; Muller, M.; Murillo, R.; Nagasaka, Y.; Petersen, J.; Pope, B.; Prigent, D.; Ryabov, Y.; Schlereth, J.; Sloper, J.E.; Soloviev, I.; Spiwoks, R.; Stancu, S.; Strong, J.; Trembler, L.; Unel, G.; Vandelli, W.; Werner, P.; Wickens, F.; Wiesmann, M.; Wu, M.; Yasu, Y.;

2005 / IEEE / 0-7803-9183-7

Description

This item was taken from the IEEE Conference ' ATLAS DataFlow: the read-out subsystem, results from trigger and data-acquisition system testbed studies and from modeling ' In the ATLAS experiment at the LHC, the output of readout hardware specific to each subdetector will be transmitted to buffers, located on custom made PCI cards (""ROBINs""). The data consist of fragments of events accepted by the first-level trigger at a maximum rate of 100 kHz. Groups of four ROBINs will be hosted in about 150 read-out subsystem (ROS) PCs. Event data are forwarded on request via Gigabit Ethernet links and switches to the second-level trigger or to the event builder. In this paper a discussion of the functionality and real-time properties of the ROS is combined with a presentation of measurement and modeling results for a testbed with a size of about 20% of the final DAQ system. Experimental results on strategies for optimizing the system performance, such as utilization of different network architectures and network transfer protocols, are presented for the testbed, together with extrapolations to the full system.