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Thermally robust dual-work function ALD-MN/sub x/ MOSFETs using conventional CMOS process flow

By: Park, D.-G.; Luo, Z.J.; Wann, C.H.; Sekiguchi, A.; Ng, H.; Rengarajan, R.; Jammy, R.; Wise, R.; Steegen, A.; Narayanan, V.; D'Emic, C.; Kozlowski, P.; Duch, E.; Kim, H.; Ku, V.; Mitchell, R.; Chakravarti, A.; Ronsheim, P.; Gluschenkov, O.; Bruley, J.; Chudzik, M.; Chou, A.; Lee, B.H.; Jamison, P.; Edleman, N.; Zhu, W.; Nguyen, P.; Wong, K.; Cabral, C.;

2004 / IEEE / 0-7803-8289-7

Description

This item was taken from the IEEE Conference ' Thermally robust dual-work function ALD-MN/sub x/ MOSFETs using conventional CMOS process flow ' Thermally stable dual work function metal gates are demonstrated using a conventional CMOS process flow. The gate structure consists of poly-Si/metal nitrides (MN/sub x/) SiON (or high-k)/Si stack with atomic layer deposition (ALD)-TaN/sub x/ for the NFET and ALD-WN/sub x/ for the PFET. Much enhanced drive current (I/sub d/) and transconductance (G/sub m/) values, and reduced off current (I/sub off/) characteristics were attained with ALD-MN/sub x/ gated devices over control poly-Si and PVD-MN/sub x/ devices within controllable V/sub t/ shifts. Excellent scalability of dual work function MN/sub x//high-k gate stack was demonstrated: the EOT was down to 6.6/spl Aring/ with low leakage in a low thermal budget device scheme.