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A novel MNOS technology using gate hole injection in erase operation for embedded nonvolatile memory applications
By: Mizuno, M.; Hashimoto, T.; Ishii, Y.; Kanamaru, Y.; Sakai, T.; Kawashima, Y.; Ito, F.; Kubota, K.; Kuroda, K.; Okuyama, K.; Toya, T.; Shinagawa, Y.; Tanaka, T.; Kume, H.; Matsuzaki, N.; Mine, T.; Ishimaru, T.;
2004 / IEEE / 0-7803-8289-7
This item was taken from the IEEE Conference ' A novel MNOS technology using gate hole injection in erase operation for embedded nonvolatile memory applications ' A novel MNOS memory with gate hole injection in erase operation has been demonstrated for embedded nonvolatile memory applications. Superior characteristics with 10/spl mu/sec programming and 10msec erasing speed were obtained as compared with conventional MONOS structures. In addition, we found that the localized interface trap at source side region was generated by excess holes during erasing cycle and could be suppressed by Lg scaling. This result shows the good scalability of this technology.
Source Side Region
Localized Interface Trap
Embedded Nonvolatile Memory Applications
Gate Hole Injection