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An 8-channel CMOS low-noise fast readout IC for CZT X-ray detectors designed by time-domain Hspice noise simulation
By: Cho, G.; Hong, S.B.; Lee, T.H.; Chi, Y.K.; Chung, C.E.; Kim, Y.K.;
2002 / IEEE / 0-7803-7636-6
This item was taken from the IEEE Conference ' An 8-channel CMOS low-noise fast readout IC for CZT X-ray detectors designed by time-domain Hspice noise simulation ' An 8-channel CMOS low-noise readout IC is designed for CdZnTe (CZT) X-ray detector arrays. One channel of the IC is composed of a continuously discharged preamplifier and a comparator. The preamplifier is operated in pulse-mode and this is realized with a feedback capacitor and a pair of MOSFETs. The noise of this readout IC is calculated by the time-domain Hspice noise simulation. The operation region of this readout IC is over 10 MHz, so the thermal noise of the input transistor dominates over the detector shot noise and the 1/f noise of the input transistor. The calculated RMS total noise voltage at the output node of the preamplifier is 0.246 mV. The prototype chip is fabricated in 1.5 /spl mu/m CMOS technology through MOSIS and the measured noise voltage of the preamplifier output is 0.435 mV. The results suggest that the time-domain Hspice noise simulation can be used to design the low noise readout IC.
Cmos Low-noise Fast Readout Ic
Time-domain Hspice Noise Simulation
Continuously Discharged Preamplifier
Detector Shot Noise
Rms Total Noise Voltage
Integrated Circuit Noise
Cmos Integrated Circuits
Time Domain Analysis
Mos Integrated Circuits