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Highly manufacturable 90 nm DRAM technology
By: Park, Y.K.; Kinam Kim; Lee, K.H.; Roh, B.H.; Ahn, Y.S.; Lee, S.H.; Oh, J.H.; Lee, J.G.; Kwak, D.H.; Shin, S.H.; Bae, J.S.; Kim, S.B.; Lee, J.K.; Lee, J.Y.; Kim, M.S.; Lee, J.W.; Lee, D.J.; Hong, S.H.; Bae, D.I.; Chun, Y.S.; Park, S.H.; Yun, C.J.; Chung, T.Y.; Cho, C.H.;
2002 / IEEE / 0-7803-7462-2
This item was taken from the IEEE Conference ' Highly manufacturable 90 nm DRAM technology ' A 90 nm DRAM technology has been successfully developed using 512 Mb DRAM for the first time. ArF lithography is used for printing critical layers with resolution enhancement techniques. A novel gap-filling technology using spin coating oxide is developed for STI and ILD processes. A diamond-shaped storage node is newly developed for large capacitor area with better mechanical stability. A CVD Al process can make the back-end metallization process simple and easy. A dual gate oxide scheme can provide independent optimization for memory cell transistor and periphery support device so that the off-state leakage current of the cell transistor can be maintained below 0.1 fA.
Integrated Circuit Technology
Resolution Enhancement Techniques
Spin Coating Oxide
Diamond-shaped Storage Node
Large Capacitor Area
Cvd Al Process
Back-end Metallization Process
Dual Gate Oxide Scheme
Memory Cell Transistor Optimization
Periphery Support Device Optimization
Cell Transistor Off-state Leakage Current
Random Access Memory
Research And Development
Integrated Circuit Manufacture