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MOSFET devices with polysilicon on single-layer HfO/sub 2/ high-K dielectrics

By: Byoung Hun Lee; Jeon, Y.; Onishi, K.; Kang, L.; Lee, J.C.; Kang, C.; Choi, R.; Gopalan, S.; Nieh, R.; Wen-Jie Qi;

2000 / IEEE / 0-7803-6438-4

Description

This item was taken from the IEEE Conference ' MOSFET devices with polysilicon on single-layer HfO/sub 2/ high-K dielectrics ' MOSFETs and MOSCAPs of a single-layer thin HfO/sub 2/ gate dielectric with dual polysilicon gate were fabricated with self-aligned process and characterized. Polysilicon and dopant activation processes were optimized such that leakage current and equivalent oxide thickness (EOT) of HfO/sub 2/ remain low (EOT of 12.0 /spl Aring/. HfO/sub 2/ with 1/spl times/10/sup -3/ A/cm/sup 2/ at Vg=1.0 V). Reasonable N- and P-MOSFET characteristics such as subthreshold swing of 74 mV/decade and output currents were also demonstrated.