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The ATLAS tile calorimeter digitizer
By: Sellden, B.; Silverstein, S.; Klereborn, J.; Ramstedt, M.; Jon-And, K.; Holmgren, S.-O.; Engstrom, M.; Bohm, C.; Berglund, S.; Wu, H.; Tang, F.; Sanders, H.; Pilcher, J.; Hocker, A.; Anderson, K.;
1999 / IEEE / 0-7803-5696-9
This item was taken from the IEEE Conference ' The ATLAS tile calorimeter digitizer ' We describe a readout system designed to serve the 9728 PMT channels of the ATLAS Tile calorimeter at LHC. The system will be located immediately outside the calorimeter with limited accessibility and moderate radiation levels, making reliability an important issue in the design. Six or eight boards per calorimeter module each receive and digitize high and low gain signals from six PMTs every 25 ns. Two custom designed gate arrays on each board store the data in digital pipelines until validated by the first level trigger. Selected data are formatted and read out for use by the DAQ and second level trigger systems. Configuration and control commands are distributed to the digitizer boards via the TTC clock distribution system. The current digitizer design was developed for test beam tests during summer 1999, and the final system is scheduled for volume production in the beginning of 2000.
Error Correction Codes
Large Hadron Collider
Second Level Trigger Systems
First Level Trigger
Custom Designed Gate Arrays
Atlas Tile Calorimeter Digitizer
Ttc Clock Distribution System
Application Specific Integrated Circuits
Solid Scintillation Detectors