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0.18 /spl mu/m CMOS and beyond

By: Eaglesham, D.J.;

1999 / IEEE / 1-58113-092-9


This item was taken from the IEEE Conference ' 0.18 /spl mu/m CMOS and beyond ' As we move to the 0.18 /spl mu/m node and beyond, the dominant trend in device and process technology is a simple continuation of several decades of scaling. However, some serious challenges to straightforward scaling are on the horizon. This paper reviews the present status of process technology and examines the likely departures from scaling in the various areas. The 0.18 /spl mu/m node is seeing the first major new materials introduced into the Si process for many years in the interconnect, and major departures from the traditional process are being actively considered for the transistor. However, it is probable that continued scaling will continue to dominate advanced processes for several generations to come.