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Deep submicron on-chip crosstalk [and ANN prediction]
By: Yang, Z.; Mourad, S.;
1999 / IEEE / 0-7803-5276-9
Description
This item was taken from the IEEE Conference ' Deep submicron on-chip crosstalk [and ANN prediction] ' In this paper, we study the effect of crosstalk using three deep submicron technologies. We start the experiment by comparing the different technologies. Then we concentrate on 0.18 /spl mu/m technology to examine the effect of different parameters on the crosstalk voltage peak and circuit timing. The parameters of interest are the size of the driving and load device and the length of the coupled line. The results confirmed that finer technologies cause higher impact. The magnitude of crosstalk in 0.18 /spl mu/m may be high enough to violate noise margin. Preliminary layout guidelines are deduced. To facilitate applying them to CAD tools, an ANN was used to predict crosstalk given data on the driver, the load and the length of the interconnect.
Related Topics
Integrated Circuit Layout
Integrated Circuit Modelling
Spice
Circuit Layout Cad
Neural Nets
Integrated Circuit Interconnections
0.18 Micron
Deep Submicron On-chip Crosstalk
Different Parameters Effect
Crosstalk Voltage Peak
Circuit Timing
Driving And Load Device Size
Coupled Line Length
Noise Margin
Cad Tools
Ann Network
Interconnect Length
Signal Interference
Modelling
Hspice
Equivalent Circuit
Ic Design
Crosstalk
Voltage
Integrated Circuit Interconnections
Driver Circuits
Couplings
Propagation Losses
Transmission Lines
Impedance
Routing
Timing
Crosstalk
Equivalent Circuits
Engineering
Layout Guidelines