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The best combination of aluminum and copper interconnects for a high performance 0.18 /spl mu/m CMOS logic device

By: Morimoto, N.; Kawashima, H.; Amishiro, H.; Harada, A.; Igarashi, M.; Arima, H.; Kusumi, Y.; Toyoda, Y.; Higashitani, K.; Fukada, T.; Mori, T.; Ohsaki, A.; Saito, T.;

1998 / IEEE / 0-7803-4774-9

Description

This item was taken from the IEEE Conference ' The best combination of aluminum and copper interconnects for a high performance 0.18 /spl mu/m CMOS logic device ' A high performance 0.18 /spl mu/m CMOS logic device has been developed with 0.15 /spl mu/m transistors and six-level interconnects. The multi-level interconnect system consists of a conventional process with Al wire and a dual damascene process with Cu wire. 4-level Al interconnects with fine metal pitch are suitable for short distance wiring such as intra block cell to cell interconnects, whereas 2-level Cu interconnects with coarse metal pitch are used for long distance wiring such as mega block to block interconnects to achieve high-speed and high-density LSI devices.