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High performance pMOSFET with BF/sub 3/ plasma doped gate/source/drain and S/D extension

By: Jeong, U.; Goeckner, M.; Lee, M.Y.; Kang, H.K.; Fujihara, K.; Felch, S.; Song, H.J.; Kim, H.S.; Song, W.S.; Kikm, S.P.; Kim, W.S.; Park, J.W.; Ha, J.M.; Lee, G.C.; Ko, D.H.; Kim, Y.K.; Cho, H.T.; Kim, H.J.; Shim, K.H.;

1998 / IEEE / 0-7803-4774-9

Description

This item was taken from the IEEE Conference ' High performance pMOSFET with BF/sub 3/ plasma doped gate/source/drain and S/D extension ' A BF/sub 3/ Plasma doping (PLAD) process has been utilized in source/drain/gate and shallow S/D extension for high performance 0.18 /spl mu/m pMOSFET. Gate oxide reliability, drain current, and transconductance of the pMOSFET with BF/sub 3/ PLAD are remarkably improved compared to those of BF/sub 2/ ion implanted devices. Cobalt salicide formation is also compatible with the plasma doped S/D junction.