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A voltage-regulated static keeper technique for high-performance ASICs

By: Kanno, H.; Tokashiki, K.; Kubo, A.; Abiko, H.; Saeki, T.;

1998 / IEEE / 0-7803-4980-6

Description

This item was taken from the IEEE Conference ' A voltage-regulated static keeper technique for high-performance ASICs ' A Voltage-Regulated Static Keeper (VRSK) technique is proposed. The VRSK can be applied to any dynamic circuit without size optimization and dissipates only one-third power of a static keeper. A 4-bit demultiplexer incorporating the VRSK can operate up to 2.0 GHz with a power consumption of only 5.8 mW.