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Low power methodology and design techniques for processor design

By: Kenyon, S.; Dean, A.; Brennan, J.P.; Ventrone, S.;

1998 / IEEE / 1-58113-059-7

Description

This item was taken from the IEEE Conference ' Low power methodology and design techniques for processor design ' IBM's ASIC design methodologies is used to develop a low power microprocessor for the mobile (battery powered) marketplace. The design called for a reduction of active power by a factor of 10 times from an estimate of a product designed in a standard 3 volt ASIC design system. An overview of the design methodology and some of the innovative power reduction techniques are presented.