Use this resource - and many more! - in your textbook!
AcademicPub holds over eight million pieces of educational content for you to mix-and-match your way.
A pocket implant model for sub-0.18 micron CMOS process flows
1997 / IEEE / 0-7803-3775-1
This item was taken from the IEEE Conference ' A pocket implant model for sub-0.18 micron CMOS process flows ' In this paper we present a method of arriving at dopant distributions required for accurate performance estimation of 0.18 micron CMOS flows with pocket implants. Dopant profiles are calculated using a combination of physical and phenomenological models and measured device performance data. The method is demonstrated for NMOS and PMOS devices with varying pocket implant doses, energies and angles, and scaled supply voltages.
Pocket Implant Model
Submicron Cmos Process Flows
Device Performance Data
Scaled Supply Voltages
Semiconductor Device Modeling
Semiconductor Process Modeling
Semiconductor Device Models
Integrated Circuit Modelling
Semiconductor Process Modelling
Cmos Integrated Circuits